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    <title>topic Re: Intel 82580 PCIe reference clock termination in Embedded Connectivity</title>
    <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695252#M2003</link>
    <description>&lt;P&gt;Hello Michael,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your support.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are the motherboard manufacturer. We looked at the 82580 reference design and there is no termination.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The question is do we add terminaison depending on the distance between our clock generator and the 82580 reference clock input to improve if needed the signal integrity.&lt;/P&gt;&lt;P&gt;Is there an integrated terminaison inside the 82580 - fixed or configurable by software ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 05 Sep 2019 14:00:17 GMT</pubDate>
    <dc:creator>DMau</dc:creator>
    <dc:date>2019-09-05T14:00:17Z</dc:date>
    <item>
      <title>Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695250#M2001</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have a single board including both PCIe reference clock generator (Abracon AB-557-03) and Intel 82580 ethernet controller.&lt;/P&gt;&lt;P&gt;In this configuration without add-in card, is it a best practice to add 100 ohms termination resistor close to the 82580 input (PE_CLK) ?&lt;/P&gt;&lt;P&gt;Is there internal termination resistor configurable by one of the 82580 registers ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;</description>
      <pubDate>Thu, 05 Sep 2019 01:40:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695250#M2001</guid>
      <dc:creator>DMau</dc:creator>
      <dc:date>2019-09-05T01:40:35Z</dc:date>
    </item>
    <item>
      <title>Re: Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695251#M2002</link>
      <description>&lt;P&gt;Hello David,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for posting in Intel Ethernet Communities.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regarding your inquiry, you may contact the manufacturer of the motherboard since you are using an on-board NIC.&lt;/P&gt;&lt;P&gt;At the same time, I will a also route this thread to our embedded team for them to further assist you. &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If you have questions, please let us know. &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Michael L.&lt;/P&gt;&lt;P&gt;Intel Customer Support Technicians&lt;/P&gt;&lt;P&gt;A Contingent Worker at Intel&lt;/P&gt;</description>
      <pubDate>Thu, 05 Sep 2019 11:28:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695251#M2002</guid>
      <dc:creator>Mike_Intel</dc:creator>
      <dc:date>2019-09-05T11:28:01Z</dc:date>
    </item>
    <item>
      <title>Re: Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695252#M2003</link>
      <description>&lt;P&gt;Hello Michael,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your support.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are the motherboard manufacturer. We looked at the 82580 reference design and there is no termination.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The question is do we add terminaison depending on the distance between our clock generator and the 82580 reference clock input to improve if needed the signal integrity.&lt;/P&gt;&lt;P&gt;Is there an integrated terminaison inside the 82580 - fixed or configurable by software ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 05 Sep 2019 14:00:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695252#M2003</guid>
      <dc:creator>DMau</dc:creator>
      <dc:date>2019-09-05T14:00:17Z</dc:date>
    </item>
    <item>
      <title>Re: Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695253#M2004</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/DMau"&gt;@DMau&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please list the sources used to design the units related to your questions, also&amp;nbsp;if it has been verified by Intel?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are waiting for your clarification.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Thu, 05 Sep 2019 21:28:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695253#M2004</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-09-05T21:28:46Z</dc:date>
    </item>
    <item>
      <title>Re: Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695254#M2005</link>
      <description>&lt;P&gt;Hello Maecenas,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here are the documents:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;82580 REFERENCE DESIGN (schematic), doc.number 322445-006EN, rev.2.1 2010-04-02&lt;/LI&gt;&lt;LI&gt;Intel® 82580EB/82580DB Gigabit Ethernet Controller Datasheet, revision 2.5 October 2011&lt;/LI&gt;&lt;LI&gt;Intel® 82580EB/82580DB Gigabit Ethernet Controller Datasheet, revision 2.6 August 2015&lt;/LI&gt;&lt;LI&gt;PCI Express ®&amp;nbsp;&amp;nbsp;Card Electromechanical Specification Revision 2.0 , April 11, 2007&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Our design has not been verified by Intel.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks and best regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;</description>
      <pubDate>Fri, 06 Sep 2019 13:25:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695254#M2005</guid>
      <dc:creator>DMau</dc:creator>
      <dc:date>2019-09-06T13:25:53Z</dc:date>
    </item>
    <item>
      <title>Re: Intel 82580 PCIe reference clock termination</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695255#M2006</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/DMau"&gt;@DMau&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Your implementation can be verified by Intel if you follow the steps stated at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://edc.intel.com/Tools/Design-Review/Default.aspx" target="_self" alt="https://edc.intel.com/Tools/Design-Review/Default.aspx"&gt;&lt;/A&gt;&lt;A href="https://edc.intel.com/Tools/Design-Review/Default.aspx"&gt;https://edc.intel.com/Tools/Design-Review/Default.aspx&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Fri, 06 Sep 2019 20:37:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/Intel-82580-PCIe-reference-clock-termination/m-p/695255#M2006</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-09-06T20:37:58Z</dc:date>
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