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    <title>topic Re:INTEL E810-CQDA2 found a unknown address to request sg list in Ethernet Products</title>
    <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741374#M44039</link>
    <description>&lt;P&gt;Hello rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for sharing the information requested.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;For us to check further, kindly help to generate the SSU log and share with us. You may follow steps in link below:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sazzy_Intel&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Thu, 19 Mar 2026 05:32:21 GMT</pubDate>
    <dc:creator>Sazirah</dc:creator>
    <dc:date>2026-03-19T05:32:21Z</dc:date>
    <item>
      <title>INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741267#M44031</link>
      <description>&lt;P&gt;While performing RDMA operations, I observed some memory addresses related to the scatter-gather (SG) table in the logs printed by the driver. When I captured and analyzed PCIe traffic using a FPGA ILA probe, I found that these addresses were obtained via requests to an unregistered/undeclared memory address. Moreover, during each RDMA operation, the SG table memory addresses are consistently fetched from this unknown address. I would like to understand where this address originates from.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="企业微信截图_17738175051124.png" style="width: 983px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/71572i79A9F2A4EF20EB1F/image-size/large/is-moderation-mode/true?v=v2&amp;amp;px=999&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="企业微信截图_17738175051124.png" alt="企业微信截图_17738175051124.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;ILA example :&lt;/P&gt;&lt;P&gt;req package data:000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 003800001c0000100000000fb47d2000&lt;BR /&gt;resp package data:000000000000000fd059f000000000100b1170000000000fcdf8e0000000000fcdd020000000000fcf60e0000000000fcf206000 010000001c00001000400000&lt;/P&gt;&lt;P&gt;The unknown address is&amp;nbsp;0000000fb47d2000.&lt;/P&gt;&lt;P&gt;Thx.&lt;/P&gt;</description>
      <pubDate>Wed, 18 Mar 2026 07:10:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741267#M44031</guid>
      <dc:creator>rdma_fresh1234</dc:creator>
      <dc:date>2026-03-18T07:10:11Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741287#M44032</link>
      <description>&lt;P&gt;Thank you for reaching out and sharing the details. To ensure you get the most accurate and timely response, there is a dedicated forum for these types of issues. I’m moving your thread there so our specialized team can assist you directly.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We truly appreciate your patience and look forward to helping you resolve this quickly.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Goutham,&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 18 Mar 2026 10:19:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741287#M44032</guid>
      <dc:creator>Goutham_intel</dc:creator>
      <dc:date>2026-03-18T10:19:04Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741297#M44033</link>
      <description>&lt;P&gt;Hello rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Greetings!&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We understand that you are encountering an "unregistered/undeclared memory address" error while performing RDMA operations. To assist you further, we kindly request that you provide the following information:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;1) Complete model of the adapter&lt;/P&gt;&lt;P&gt;2) Details of any recent changes made to the system (hardware or software)&lt;/P&gt;&lt;P&gt;3) Confirmation on whether the adapter came with the system or was purchased separately&lt;/P&gt;&lt;P&gt;4) SSU logs for further analysis&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Pujeeth_Intel&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 18 Mar 2026 11:42:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741297#M44033</guid>
      <dc:creator>pujeeth</dc:creator>
      <dc:date>2026-03-18T11:42:13Z</dc:date>
    </item>
    <item>
      <title>Re: Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741361#M44038</link>
      <description>&lt;P&gt;1) Adapter model is E810-CQDA2.&lt;/P&gt;&lt;P&gt;2) Linux System :&amp;nbsp;Linux test 5.4.0-216-generic #236-Ubuntu SMP Fri Apr 11 19:53:21 UTC 2025 x86_64 x86_64 x86_64 GNU/Linux,&lt;/P&gt;&lt;P&gt;irdma driver version : 1.10.15, rdma tools is rdma-example-master(from github).&lt;/P&gt;&lt;P&gt;3) I purchased this network adapter separately, and then downloaded the driver version from the &lt;SPAN class=""&gt;&lt;SPAN class=""&gt;Intel&lt;/SPAN&gt;&lt;/SPAN&gt; official website according to the online instructions.&lt;/P&gt;&lt;P&gt;4)&amp;nbsp;I found that this address behaves like a fixed address negotiated between the host and the device when the irdma driver is loaded, possibly similar to the PBL described in the Ethernet Controller E810 Datasheet doc. During each RDMA operation, this fixed address is accessed to obtain an SG address table.&lt;/P&gt;&lt;P&gt;When the NIC processes CQP commands such as Allocate/Register/RegisterShared/Deallocate STag Descriptor Format(OP = 0x0A), if Leaf_PBL_Size&amp;nbsp; is not 00b, the NIC applies a fixed offset to this address and accesses it, then retrieves a set of Physical_Buffer_Address entries corresponding to the MR.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thx.&lt;/P&gt;</description>
      <pubDate>Thu, 19 Mar 2026 02:48:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741361#M44038</guid>
      <dc:creator>rdma_fresh1234</dc:creator>
      <dc:date>2026-03-19T02:48:51Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741374#M44039</link>
      <description>&lt;P&gt;Hello rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for sharing the information requested.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;For us to check further, kindly help to generate the SSU log and share with us. You may follow steps in link below:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sazzy_Intel&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 19 Mar 2026 05:32:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741374#M44039</guid>
      <dc:creator>Sazirah</dc:creator>
      <dc:date>2026-03-19T05:32:21Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741375#M44040</link>
      <description>&lt;P&gt;Hello rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for sharing the details with us.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;To proceed with further analysis, kindly provide the &lt;STRONG&gt;SSU (System Support Utility) logs&lt;/STRONG&gt; at your convenience.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;You can generate the SSU logs by following the instructions available at the link below:&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/support/articles/000008563/ethernet-products.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Shankith K P&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 19 Mar 2026 05:39:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741375#M44040</guid>
      <dc:creator>Shankith</dc:creator>
      <dc:date>2026-03-19T05:39:01Z</dc:date>
    </item>
    <item>
      <title>Re: INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741398#M44042</link>
      <description>&lt;P&gt;I used one QSFP interface of the E810&lt;/P&gt;&lt;P&gt;Below is a part of log.txt contents:&lt;/P&gt;&lt;P&gt;[15013.182015] ice 0000:1c:00.0 ens1f0: NIC Link is up 100 Gbps Full Duplex, Requested FEC: RS-FEC, Negotiated FEC: RS-FEC, Autoneg Advertised: On, Autoneg Negotiated: True, Flow Control: None&lt;BR /&gt;[15013.190914] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;[15013.191018] IPv6: ADDRCONF(NETDEV_CHANGE): ens1f0: link becomes ready&lt;BR /&gt;[15014.920456] ice 0000:1c:00.0: Commit DCB Configuration to the hardware&lt;BR /&gt;[15014.999472] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;[15015.489511] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;[15015.489571] ice 0000:1c:00.0: Commit DCB Configuration to the hardware&lt;BR /&gt;[15015.565982] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;[15016.061908] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;[15079.391078] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15079.391672] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15146.943249] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15146.987914] irdma_dbg_pf_exit: removing debugfs entries&lt;BR /&gt;[15147.003532] infiniband iwp28s0f0: ib_query_port failed (-19)&lt;BR /&gt;[15147.047902] irdma_dbg_pf_exit: removing debugfs entries&lt;BR /&gt;[15154.871234] irdma driver version: 2.0.34&lt;BR /&gt;[15154.871319] irdma: minor version mismatch: expected 10.4 caller specified 10.2&lt;BR /&gt;[15154.871323] probe: cdev_info=00000000b5adb8ea, cdev_info-&amp;gt;dev.aux_dev.bus-&amp;gt;number=28, cdev_info-&amp;gt;rdma_active_port=0xff netdev=ens1f0&lt;BR /&gt;[15154.871350] irdma: Because roce_ena is ENABLED, roce_port_cfg will be ignored.&lt;BR /&gt;[15154.871356] ice 0000:1c:00.0: irdma_fill_device_info: iwdev-&amp;gt;lag_mode = 0&lt;BR /&gt;[15154.993442] irdma_dbg_prep_dump_buf: irdma_dbg_dump_buf_len = 16384&lt;BR /&gt;[15154.996056] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;[15154.997132] irdma: minor version mismatch: expected 10.4 caller specified 10.2&lt;BR /&gt;[15154.997135] probe: cdev_info=000000001fc9a706, cdev_info-&amp;gt;dev.aux_dev.bus-&amp;gt;number=28, cdev_info-&amp;gt;rdma_active_port=0xff netdev=ens1f1&lt;BR /&gt;[15154.997164] ice 0000:1c:00.1: irdma_fill_device_info: iwdev-&amp;gt;lag_mode = 0&lt;BR /&gt;[15155.116780] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15155.117020] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15155.117287] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;[15155.118855] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;#Interface ens1f0&lt;BR /&gt;NIC statistics:&lt;BR /&gt;rx_unicast: 7&lt;BR /&gt;tx_unicast: 7&lt;BR /&gt;rx_multicast: 19&lt;BR /&gt;tx_multicast: 46&lt;BR /&gt;rx_broadcast: 0&lt;BR /&gt;tx_broadcast: 1&lt;BR /&gt;rx_bytes: 2967&lt;BR /&gt;tx_bytes: 5318&lt;BR /&gt;rx_dropped: 1&lt;BR /&gt;rx_unknown_protocol: 0&lt;BR /&gt;rx_alloc_fail: 0&lt;BR /&gt;rx_pg_alloc_fail: 0&lt;BR /&gt;tx_errors: 0&lt;BR /&gt;tx_linearized: 0&lt;BR /&gt;tx_busy: 0&lt;BR /&gt;tx_restart: 0&lt;BR /&gt;tx_queue_0_packets: 0&lt;BR /&gt;tx_queue_0_bytes: 0&lt;BR /&gt;tx_queue_1_packets: 0&lt;BR /&gt;tx_queue_1_bytes: 0&lt;BR /&gt;tx_queue_2_packets: 12&lt;BR /&gt;tx_queue_2_bytes: 936&lt;BR /&gt;tx_queue_3_packets: 0&lt;BR /&gt;tx_queue_3_bytes: 0&lt;BR /&gt;tx_queue_4_packets: 27&lt;BR /&gt;tx_queue_4_bytes: 1971&lt;BR /&gt;tx_queue_5_packets: 0&lt;BR /&gt;tx_queue_5_bytes: 0&lt;BR /&gt;tx_queue_6_packets: 0&lt;BR /&gt;tx_queue_6_bytes: 0&lt;BR /&gt;tx_queue_7_packets: 0&lt;BR /&gt;tx_queue_7_bytes: 0&lt;BR /&gt;tx_queue_8_packets: 0&lt;BR /&gt;tx_queue_8_bytes: 0&lt;BR /&gt;tx_queue_9_packets: 0&lt;BR /&gt;tx_queue_9_bytes: 0&lt;BR /&gt;tx_queue_10_packets: 0&lt;BR /&gt;tx_queue_10_bytes: 0&lt;BR /&gt;tx_queue_11_packets: 0&lt;BR /&gt;tx_queue_11_bytes: 0&lt;BR /&gt;tx_queue_12_packets: 0&lt;BR /&gt;tx_queue_12_bytes: 0&lt;BR /&gt;tx_queue_13_packets: 0&lt;BR /&gt;tx_queue_13_bytes: 0&lt;BR /&gt;tx_queue_14_packets: 0&lt;BR /&gt;tx_queue_14_bytes: 0&lt;BR /&gt;tx_queue_15_packets: 0&lt;BR /&gt;tx_queue_15_bytes: 0&lt;BR /&gt;tx_queue_16_packets: 0&lt;BR /&gt;tx_queue_16_bytes: 0&lt;BR /&gt;tx_queue_17_packets: 0&lt;BR /&gt;tx_queue_17_bytes: 0&lt;BR /&gt;tx_queue_18_packets: 0&lt;BR /&gt;tx_queue_18_bytes: 0&lt;BR /&gt;tx_queue_19_packets: 0&lt;BR /&gt;tx_queue_19_bytes: 0&lt;BR /&gt;tx_queue_20_packets: 0&lt;BR /&gt;tx_queue_20_bytes: 0&lt;BR /&gt;tx_queue_21_packets: 1&lt;BR /&gt;tx_queue_21_bytes: 60&lt;BR /&gt;tx_queue_22_packets: 0&lt;BR /&gt;tx_queue_22_bytes: 0&lt;BR /&gt;tx_queue_23_packets: 0&lt;BR /&gt;tx_queue_23_bytes: 0&lt;BR /&gt;tx_queue_24_packets: 0&lt;BR /&gt;tx_queue_24_bytes: 0&lt;BR /&gt;tx_queue_25_packets: 0&lt;BR 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/&gt;rx_queue_20_bytes: 0&lt;BR /&gt;rx_queue_21_packets: 0&lt;BR /&gt;rx_queue_21_bytes: 0&lt;BR /&gt;rx_queue_22_packets: 0&lt;BR /&gt;rx_queue_22_bytes: 0&lt;BR /&gt;rx_queue_23_packets: 0&lt;BR /&gt;rx_queue_23_bytes: 0&lt;BR /&gt;rx_queue_24_packets: 0&lt;BR /&gt;rx_queue_24_bytes: 0&lt;BR /&gt;rx_queue_25_packets: 0&lt;BR /&gt;rx_queue_25_bytes: 0&lt;BR /&gt;rx_queue_26_packets: 0&lt;BR /&gt;rx_queue_26_bytes: 0&lt;BR /&gt;rx_queue_27_packets: 0&lt;BR /&gt;rx_queue_27_bytes: 0&lt;BR /&gt;rx_queue_28_packets: 0&lt;BR /&gt;rx_queue_28_bytes: 0&lt;BR /&gt;rx_queue_29_packets: 0&lt;BR /&gt;rx_queue_29_bytes: 0&lt;BR /&gt;rx_queue_30_packets: 0&lt;BR /&gt;rx_queue_30_bytes: 0&lt;BR /&gt;rx_queue_31_packets: 0&lt;BR /&gt;rx_queue_31_bytes: 0&lt;BR /&gt;rx_queue_32_packets: 0&lt;BR /&gt;rx_queue_32_bytes: 0&lt;BR /&gt;rx_queue_33_packets: 0&lt;BR /&gt;rx_queue_33_bytes: 0&lt;BR /&gt;rx_queue_34_packets: 0&lt;BR /&gt;rx_queue_34_bytes: 0&lt;BR /&gt;rx_queue_35_packets: 0&lt;BR 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/&gt;rx_queue_50_bytes: 0&lt;BR /&gt;rx_queue_51_packets: 0&lt;BR /&gt;rx_queue_51_bytes: 0&lt;BR /&gt;rx_queue_52_packets: 0&lt;BR /&gt;rx_queue_52_bytes: 0&lt;BR /&gt;rx_queue_53_packets: 0&lt;BR /&gt;rx_queue_53_bytes: 0&lt;BR /&gt;rx_queue_54_packets: 0&lt;BR /&gt;rx_queue_54_bytes: 0&lt;BR /&gt;rx_queue_55_packets: 0&lt;BR /&gt;rx_queue_55_bytes: 0&lt;BR /&gt;rx_queue_56_packets: 0&lt;BR /&gt;rx_queue_56_bytes: 0&lt;BR /&gt;rx_queue_57_packets: 0&lt;BR /&gt;rx_queue_57_bytes: 0&lt;BR /&gt;rx_queue_58_packets: 0&lt;BR /&gt;rx_queue_58_bytes: 0&lt;BR /&gt;rx_queue_59_packets: 0&lt;BR /&gt;rx_queue_59_bytes: 0&lt;BR /&gt;rx_queue_60_packets: 0&lt;BR /&gt;rx_queue_60_bytes: 0&lt;BR /&gt;rx_queue_61_packets: 0&lt;BR /&gt;rx_queue_61_bytes: 0&lt;BR /&gt;rx_queue_62_packets: 0&lt;BR /&gt;rx_queue_62_bytes: 0&lt;BR /&gt;rx_queue_63_packets: 0&lt;BR /&gt;rx_queue_63_bytes: 0&lt;BR /&gt;rx_queue_64_packets: 0&lt;BR /&gt;rx_queue_64_bytes: 0&lt;BR /&gt;rx_queue_65_packets: 0&lt;BR /&gt;rx_queue_65_bytes: 0&lt;BR /&gt;rx_queue_66_packets: 0&lt;BR /&gt;rx_queue_66_bytes: 0&lt;BR /&gt;rx_queue_67_packets: 0&lt;BR /&gt;rx_queue_67_bytes: 0&lt;BR /&gt;rx_queue_68_packets: 0&lt;BR /&gt;rx_queue_68_bytes: 0&lt;BR /&gt;rx_queue_69_packets: 0&lt;BR /&gt;rx_queue_69_bytes: 0&lt;BR /&gt;rx_queue_70_packets: 0&lt;BR /&gt;rx_queue_70_bytes: 0&lt;BR /&gt;rx_queue_71_packets: 0&lt;BR /&gt;rx_queue_71_bytes: 0&lt;BR /&gt;rx_queue_72_packets: 0&lt;BR /&gt;rx_queue_72_bytes: 0&lt;BR /&gt;rx_queue_73_packets: 0&lt;BR /&gt;rx_queue_73_bytes: 0&lt;BR /&gt;rx_queue_74_packets: 0&lt;BR /&gt;rx_queue_74_bytes: 0&lt;BR /&gt;rx_queue_75_packets: 0&lt;BR /&gt;rx_queue_75_bytes: 0&lt;BR /&gt;rx_queue_76_packets: 0&lt;BR /&gt;rx_queue_76_bytes: 0&lt;BR /&gt;rx_queue_77_packets: 0&lt;BR /&gt;rx_queue_77_bytes: 0&lt;BR /&gt;rx_queue_78_packets: 0&lt;BR /&gt;rx_queue_78_bytes: 0&lt;BR /&gt;rx_queue_79_packets: 0&lt;BR /&gt;rx_queue_79_bytes: 0&lt;BR /&gt;rx_bytes.nic: 41837&lt;BR /&gt;tx_bytes.nic: 5534&lt;BR /&gt;rx_unicast.nic: 7&lt;BR /&gt;tx_unicast.nic: 7&lt;BR /&gt;rx_multicast.nic: 524&lt;BR /&gt;tx_multicast.nic: 46&lt;BR /&gt;rx_broadcast.nic: 0&lt;BR /&gt;tx_broadcast.nic: 1&lt;BR /&gt;tx_errors.nic: 0&lt;BR /&gt;tx_timeout.nic: 0&lt;BR /&gt;rx_size_64.nic: 1&lt;BR /&gt;tx_size_64.nic: 1&lt;BR /&gt;rx_size_127.nic: 527&lt;BR /&gt;tx_size_127.nic: 49&lt;BR /&gt;rx_size_255.nic: 0&lt;BR /&gt;tx_size_255.nic: 0&lt;BR /&gt;rx_size_511.nic: 2&lt;BR /&gt;tx_size_511.nic: 3&lt;BR /&gt;rx_size_1023.nic: 1&lt;BR /&gt;tx_size_1023.nic: 1&lt;BR /&gt;rx_size_1522.nic: 0&lt;BR /&gt;tx_size_1522.nic: 0&lt;BR /&gt;rx_size_big.nic: 0&lt;BR /&gt;tx_size_big.nic: 0&lt;BR /&gt;link_xon_rx.nic: 0&lt;BR /&gt;link_xon_tx.nic: 0&lt;BR /&gt;link_xoff_rx.nic: 0&lt;BR /&gt;link_xoff_tx.nic: 0&lt;BR /&gt;tx_dropped_link_down.nic: 0&lt;BR /&gt;rx_undersize.nic: 0&lt;BR /&gt;rx_fragments.nic: 0&lt;BR /&gt;rx_oversize.nic: 0&lt;BR /&gt;rx_jabber.nic: 0&lt;BR /&gt;rx_csum_bad.nic: 0&lt;BR /&gt;rx_length_errors.nic: 0&lt;BR /&gt;rx_dropped.nic: 0&lt;BR /&gt;rx_crc_errors.nic: 0&lt;BR /&gt;illegal_bytes.nic: 0&lt;BR /&gt;mac_local_faults.nic: 0&lt;BR /&gt;mac_remote_faults.nic: 0&lt;BR /&gt;fdir_sb_match.nic: 0&lt;BR /&gt;fdir_sb_status.nic: 1&lt;BR /&gt;chnl_inline_fd_match: 0&lt;BR /&gt;tx_hwtstamp_skipped: 0&lt;BR /&gt;tx_hwtstamp_timeouts: 0&lt;BR /&gt;tx_hwtstamp_flushed: 0&lt;BR /&gt;tx_hwtstamp_discarded: 0&lt;BR /&gt;late_cached_phc_updates: 0&lt;BR /&gt;tx_priority_0_xon.nic: 0&lt;BR /&gt;tx_priority_0_xoff.nic: 0&lt;BR /&gt;tx_priority_1_xon.nic: 0&lt;BR /&gt;tx_priority_1_xoff.nic: 0&lt;BR /&gt;tx_priority_2_xon.nic: 0&lt;BR /&gt;tx_priority_2_xoff.nic: 0&lt;BR /&gt;tx_priority_3_xon.nic: 0&lt;BR /&gt;tx_priority_3_xoff.nic: 0&lt;BR /&gt;tx_priority_4_xon.nic: 0&lt;BR /&gt;tx_priority_4_xoff.nic: 0&lt;BR /&gt;tx_priority_5_xon.nic: 0&lt;BR /&gt;tx_priority_5_xoff.nic: 0&lt;BR /&gt;tx_priority_6_xon.nic: 0&lt;BR /&gt;tx_priority_6_xoff.nic: 0&lt;BR /&gt;tx_priority_7_xon.nic: 0&lt;BR /&gt;tx_priority_7_xoff.nic: 0&lt;BR /&gt;rx_priority_0_xon.nic: 0&lt;BR /&gt;rx_priority_0_xoff.nic: 0&lt;BR /&gt;rx_priority_1_xon.nic: 0&lt;BR /&gt;rx_priority_1_xoff.nic: 0&lt;BR /&gt;rx_priority_2_xon.nic: 0&lt;BR /&gt;rx_priority_2_xoff.nic: 0&lt;BR /&gt;rx_priority_3_xon.nic: 0&lt;BR /&gt;rx_priority_3_xoff.nic: 0&lt;BR /&gt;rx_priority_4_xon.nic: 0&lt;BR /&gt;rx_priority_4_xoff.nic: 0&lt;BR /&gt;rx_priority_5_xon.nic: 0&lt;BR /&gt;rx_priority_5_xoff.nic: 0&lt;BR /&gt;rx_priority_6_xon.nic: 0&lt;BR /&gt;rx_priority_6_xoff.nic: 0&lt;BR /&gt;rx_priority_7_xon.nic: 0&lt;BR /&gt;rx_priority_7_xoff.nic: 0&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;Mar 19 06:39:23 test kernel: [15013.182015] ice 0000:1c:00.0 ens1f0: NIC Link is up 100 Gbps Full Duplex, Requested FEC: RS-FEC, Negotiated FEC: RS-FEC, Autoneg Advertised: On, Autoneg Negotiated: True, Flow Control: None&lt;BR /&gt;Mar 19 06:39:23 test kernel: [15013.190914] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;Mar 19 06:39:23 test kernel: [15013.191018] IPv6: ADDRCONF(NETDEV_CHANGE): ens1f0: link becomes ready&lt;BR /&gt;Mar 19 06:39:23 test systemd-networkd[1868]: ens1f0: Link UP&lt;BR /&gt;Mar 19 06:39:23 test systemd-networkd[1868]: ens1f0: Gained carrier&lt;BR /&gt;Mar 19 06:39:24 test systemd-networkd[1868]: ens1f0: Gained IPv6LL&lt;BR /&gt;Mar 19 06:39:24 test kernel: [15014.920456] ice 0000:1c:00.0: Commit DCB Configuration to the hardware&lt;BR /&gt;Mar 19 06:39:25 test kernel: [15014.999472] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Link DOWN&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Lost carrier&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Link UP&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Gained carrier&lt;BR /&gt;Mar 19 06:39:25 test kernel: [15015.489511] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;Mar 19 06:39:25 test kernel: [15015.489571] ice 0000:1c:00.0: Commit DCB Configuration to the hardware&lt;BR /&gt;Mar 19 06:39:25 test kernel: [15015.565982] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Link DOWN&lt;BR /&gt;Mar 19 06:39:25 test systemd-networkd[1868]: ens1f0: Lost carrier&lt;BR /&gt;Mar 19 06:39:26 test systemd-networkd[1868]: ens1f0: Link UP&lt;BR /&gt;Mar 19 06:39:26 test systemd-networkd[1868]: ens1f0: Gained carrier&lt;BR /&gt;Mar 19 06:39:26 test kernel: [15016.061908] 8021q: adding VLAN 0 to HW filter on device ens1f0&lt;BR /&gt;Mar 19 06:39:26 test lldpad[1902]: l2_packet_send - send: Network is down&lt;BR /&gt;Mar 19 06:39:26 test lldpad[1902]: recvfrom(Event interface): No buffer space available&lt;BR /&gt;Mar 19 06:39:27 test systemd-networkd[1868]: ens1f0: Gained IPv6LL&lt;BR /&gt;Mar 19 06:39:42 test host_ams[2085]: [2102] [2026-03-19 06:39:42.204] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:40:12 test host_ams[2085]: [2102] [2026-03-19 06:40:12.244] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:40:29 test kernel: [15079.391078] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:40:29 test kernel: [15079.391672] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:40:42 test host_ams[2085]: [2102] [2026-03-19 06:40:42.285] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:41:12 test host_ams[2085]: [2102] [2026-03-19 06:41:12.325] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:41:22 test pcie_server[2072]: [2090] [2026-03-19 06:41:22.959] [console] [info] [pcie.cpp:69] [PcieSend] Send fd 3 datasize 160&lt;BR /&gt;Mar 19 06:41:37 test kernel: [15146.943249] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:37 test kernel: [15146.987914] irdma_dbg_pf_exit: removing debugfs entries&lt;BR /&gt;Mar 19 06:41:37 test kernel: [15147.003532] infiniband iwp28s0f0: ib_query_port failed (-19)&lt;BR /&gt;Mar 19 06:41:37 test kernel: [15147.047902] irdma_dbg_pf_exit: removing debugfs entries&lt;BR /&gt;Mar 19 06:41:42 test host_ams[2085]: [2102] [2026-03-19 06:41:42.365] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:41:44 test kernel: [15154.871234] irdma driver version: 2.0.34&lt;BR /&gt;Mar 19 06:41:44 test kernel: [15154.871319] irdma: minor version mismatch: expected 10.4 caller specified 10.2&lt;BR /&gt;Mar 19 06:41:44 test kernel: [15154.871323] probe: cdev_info=00000000b5adb8ea, cdev_info-&amp;gt;dev.aux_dev.bus-&amp;gt;number=28, cdev_info-&amp;gt;rdma_active_port=0xff netdev=ens1f0&lt;BR /&gt;Mar 19 06:41:44 test kernel: [15154.871350] irdma: Because roce_ena is ENABLED, roce_port_cfg will be ignored.&lt;BR /&gt;Mar 19 06:41:44 test kernel: [15154.871356] ice 0000:1c:00.0: irdma_fill_device_info: iwdev-&amp;gt;lag_mode = 0&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15154.993442] irdma_dbg_prep_dump_buf: irdma_dbg_dump_buf_len = 16384&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15154.996056] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15154.997132] irdma: minor version mismatch: expected 10.4 caller specified 10.2&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15154.997135] probe: cdev_info=000000001fc9a706, cdev_info-&amp;gt;dev.aux_dev.bus-&amp;gt;number=28, cdev_info-&amp;gt;rdma_active_port=0xff netdev=ens1f1&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15154.997164] ice 0000:1c:00.1: irdma_fill_device_info: iwdev-&amp;gt;lag_mode = 0&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15155.116780] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15155.117020] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15155.117287] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15155.118855] INFO: Flow control is disabled for this traffic class (0) on this vsi.&lt;BR /&gt;Mar 19 06:41:45 test kernel: [15155.119723] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.322706] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.323171] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.323433] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.323694] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.323972] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.324236] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.324499] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.324762] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.325024] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.325289] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.325551] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.325813] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.326074] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.326336] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.326597] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.326859] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.327121] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.327386] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.327648] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.327910] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.328174] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.328436] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.328700] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.328963] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.329226] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.329488] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.329749] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.330010] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.330288] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.330549] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.330811] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:41:50 test kernel: [15160.331072] ens1f1 speed is unknown, defaulting to 1000&lt;BR /&gt;Mar 19 06:42:12 test host_ams[2085]: [2102] [2026-03-19 06:42:12.406] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:42:42 test host_ams[2085]: [2102] [2026-03-19 06:42:42.446] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:43:12 test host_ams[2085]: [2102] [2026-03-19 06:43:12.486] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:43:42 test host_ams[2085]: [2102] [2026-03-19 06:43:42.527] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:44:12 test host_ams[2085]: [2102] [2026-03-19 06:44:12.567] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:44:42 test host_ams[2085]: [2102] [2026-03-19 06:44:42.607] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:45:12 test host_ams[2085]: [2102] [2026-03-19 06:45:12.647] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:45:42 test host_ams[2085]: [2102] [2026-03-19 06:45:42.688] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:46:12 test host_ams[2085]: [2102] [2026-03-19 06:46:12.728] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;BR /&gt;Mar 19 06:46:42 test host_ams[2085]: [2102] [2026-03-19 06:46:42.768] [console] [error] [pcie_channel.cpp:19] recv pcie msg failed, err: Receive message from pcie server exceeds timeout.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;By the way,&amp;nbsp;that address changes when the irdma driver be loaded.&lt;/P&gt;&lt;P&gt;So i think it may be a PBL address, could someone tell me how to know PBL address about E810-CQDA2?&lt;/P&gt;</description>
      <pubDate>Thu, 19 Mar 2026 08:12:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741398#M44042</guid>
      <dc:creator>rdma_fresh1234</dc:creator>
      <dc:date>2026-03-19T08:12:21Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741574#M44050</link>
      <description>&lt;P&gt;Hello rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Greetings!&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for sharing the output. We are currently reviewing the case and will get back to you with an update as soon as possible.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Pujeeth_Intel&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 20 Mar 2026 07:32:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1741574#M44050</guid>
      <dc:creator>pujeeth</dc:creator>
      <dc:date>2026-03-20T07:32:53Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1742675#M44105</link>
      <description>&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Hello rdma_fresh1234,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Greetings!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;We would like to inform you that we are still reviewing this case and will require some additional time.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;We will get back to you as soon as possible.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Thank you for your patience and understanding.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Shankith K P&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif;"&gt;Intel Customer Support Technician&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 31 Mar 2026 08:29:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1742675#M44105</guid>
      <dc:creator>Shankith</dc:creator>
      <dc:date>2026-03-31T08:29:49Z</dc:date>
    </item>
    <item>
      <title>Re: Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1742676#M44106</link>
      <description>&lt;P&gt;Hi Shankith,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your reply!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;After my investigation and analysis over this period, I believe that this address corresponds to the memory location where the PBLE resides. And can you tell me&amp;nbsp;&lt;SPAN&gt;how does the NIC know the physical memory address where the PBLE resides?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;rdma_fresh1234&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 31 Mar 2026 08:35:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1742676#M44106</guid>
      <dc:creator>rdma_fresh1234</dc:creator>
      <dc:date>2026-03-31T08:35:14Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743038#M44114</link>
      <description>&lt;P&gt;Hi rdma_fresh1234,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Greetings.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for patiently waiting for our update.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regarding your current query which is "how does the NIC know the physical memory address where the PBLE resides", we would suggest you to check 'Section 11.4.1.4 of E810 datasheet'. Hopefully it answers your query. If you still have any other questions, please let us know.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/content-details/613875/intel-ethernet-controller-e810-datasheet.html?DocID=613875" target="_blank"&gt;https://www.intel.com/content/www/us/en/content-details/613875/intel-ethernet-controller-e810-datasheet.html?DocID=613875&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sazzy_Intel&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 03 Apr 2026 05:47:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743038#M44114</guid>
      <dc:creator>Sazirah</dc:creator>
      <dc:date>2026-04-03T05:47:47Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743494#M44132</link>
      <description>&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Hello rdma_fresh1234,,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Greetings for the day!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;We are following up to check if you were able to find the information we provided.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Kindly revert back to us and let us know if you need any further assistance or if we can go ahead and close this thread.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Shankith K P&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;​​​​​​​Intel Customer Support Technician&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 07 Apr 2026 08:34:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743494#M44132</guid>
      <dc:creator>Shankith</dc:creator>
      <dc:date>2026-04-07T08:34:13Z</dc:date>
    </item>
    <item>
      <title>Re: Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743495#M44133</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Shankith,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Greetings.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Based on &lt;SPAN&gt;Sazirah&lt;/SPAN&gt;’s suggestion, I reviewed the relevant sections of the documentation. During initialization, I indeed observed that the driver performs a large number of &lt;STRONG&gt;Update PE SDs&lt;/STRONG&gt; operations with the NIC via CQP commands. From the data, it appears that the PBLE address is derived by applying an offset to the SD address when the &lt;EM&gt;Index of the HMC Segment Descriptor&lt;/EM&gt; equals &lt;STRONG&gt;0x05c&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;My current questions are:&lt;/P&gt;&lt;P&gt;1）During the numerous &lt;STRONG&gt;Update PE SDs&lt;/STRONG&gt; operations in the initialization phase, how does the NIC determine which SD entry should be used as the base address for the PBLE?&lt;/P&gt;&lt;P&gt;2）How does the NIC obtain the offset required to derive the PBLE address from the SD address?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;rdma_fresh1234&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 07 Apr 2026 08:47:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743495#M44133</guid>
      <dc:creator>rdma_fresh1234</dc:creator>
      <dc:date>2026-04-07T08:47:56Z</dc:date>
    </item>
    <item>
      <title>Re:INTEL E810-CQDA2 found a unknown address to request sg list</title>
      <link>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743496#M44134</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 14px; font-family: sans-serif;"&gt;Hello rdma_fresh1234,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 14px; font-family: sans-serif;"&gt;Thank you for writing back.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 14px; font-family: sans-serif;"&gt;We will check this internally and we will get back to you with an update.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 14px; font-family: sans-serif;"&gt;Thank you for your patience.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;Shankith K P&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: sans-serif; font-size: 14px;"&gt;​​​​​​​Intel Customer Support Technician&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 07 Apr 2026 09:11:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Ethernet-Products/INTEL-E810-CQDA2-found-a-unknown-address-to-request-sg-list/m-p/1743496#M44134</guid>
      <dc:creator>Shankith</dc:creator>
      <dc:date>2026-04-07T09:11:33Z</dc:date>
    </item>
  </channel>
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