https://community.intel.com/t5/GPU-Compute-Software/Is-it-possible-to-force-compiler-to-map-one-thread-instead-of/m-p/1665610#M1731 <P><SPAN>"oneAPI GPU Optimization Guide" reads:&nbsp;</SPAN></P><P>&nbsp;</P><P><SPAN>"Each VE is a multi-threaded SIMD processor. The compiler generates SIMD code to map several work-items to be executed simultaneously within a given hardware thread. The SIMD-width for a kernel is a heuristic driven compiler choice. Common SIMD-width examples are SIMD-8, SIMD-16, and SIMD-32."</SPAN></P><P>&nbsp;</P><P><SPAN>In case of a highly divergent kernel, is it possible to force the compiler to SIMD-1, i.e. only one work item using the whole XVE SIMD16 engine at a time? The reason would be to avoid exponential overhead when each work item's control flow is different.</SPAN></P> Thu, 13 Feb 2025 03:06:41 GMT pauljurczak 2025-02-13T03:06:41Z https://community.intel.com/t5/GPU-Compute-Software/Is-it-possible-to-force-compiler-to-map-one-thread-instead-of/m-p/1665610#M1731 <P><SPAN>"oneAPI GPU Optimization Guide" reads:&nbsp;</SPAN></P><P>&nbsp;</P><P><SPAN>"Each VE is a multi-threaded SIMD processor. The compiler generates SIMD code to map several work-items to be executed simultaneously within a given hardware thread. The SIMD-width for a kernel is a heuristic driven compiler choice. Common SIMD-width examples are SIMD-8, SIMD-16, and SIMD-32."</SPAN></P><P>&nbsp;</P><P><SPAN>In case of a highly divergent kernel, is it possible to force the compiler to SIMD-1, i.e. only one work item using the whole XVE SIMD16 engine at a time? The reason would be to avoid exponential overhead when each work item's control flow is different.</SPAN></P> Thu, 13 Feb 2025 03:06:41 GMT https://community.intel.com/t5/GPU-Compute-Software/Is-it-possible-to-force-compiler-to-map-one-thread-instead-of/m-p/1665610#M1731 pauljurczak 2025-02-13T03:06:41Z