<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re:device queue Intel Iris Xe Graphics in GPU Compute Software</title>
    <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1393287#M531</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We haven't heard back from you. Could you please provide an update on your issue?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Noorjahan.&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Fri, 17 Jun 2022 04:44:23 GMT</pubDate>
    <dc:creator>NoorjahanSk_Intel</dc:creator>
    <dc:date>2022-06-17T04:44:23Z</dc:date>
    <item>
      <title>device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1389785#M503</link>
      <description>&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;I writing opencl program where i use "enqueue_kernel" command. this command need as parameter device queue.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;if i call :&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;cl_command_queue_properties properties = {CL_QUEUE_PROPERTIES, CL_QUEUE_ON_DEVICE | CL_QUEUE_ON_DEVICE_DEFAULT, CL_QUEUE_SIZE, 20000,0};&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;cl_queue_properties queue_properties[] = {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;CL_QUEUE_PROPERTIES, properties, 0 };&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;wsp_p-&amp;gt;queue = clCreateCommandQueueWithProperties (wsp_p-&amp;gt;opencl-&amp;gt;ctx, wsp_p-&amp;gt;opencl-&amp;gt;device,queue_properties, &amp;amp;err);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;queue are created , and some kernels(without enqueue_kernel() call) are executed.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;but if i call&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;clSetKernelArg (ocl_prog-&amp;gt;kernel, 3, sizeof(cl_command_queue),&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;&amp;amp;ocl_data-&amp;gt;queue);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;it return -70 (invalid device queue).&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;It seems, that always host side command queue are created&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;I read the number of max device queues via :&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;err = clGetDeviceInfo (ocldev.device, CL_DEVICE_MAX_ON_DEVICE_QUEUES,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;sizeof(cl_uint), &amp;amp;c,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="sub_section_element_selectors"&gt;&amp;amp;ret_param_size);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;but the result is 0.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;I am wondering , because the opencl spec says :&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;CODE&gt;CL_​DEVICE_​MAX_​ON_​DEVICE_​QUEUES&lt;/CODE&gt;&lt;SPAN class="sub_section_element_selectors"&gt; :&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;The maximum number of device queues that can be created for this device in a single context.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;STRONG class="sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;The minimum value is 1.&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;attached is the log of clinfo.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;any idea ?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;best regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="tableblock sub_section_element_selectors"&gt;&lt;SPAN class="sub_section_element_selectors"&gt;Andreas&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 03 Jun 2022 07:17:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1389785#M503</guid>
      <dc:creator>Andreas4</dc:creator>
      <dc:date>2022-06-03T07:17:32Z</dc:date>
    </item>
    <item>
      <title>Re: device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1389908#M504</link>
      <description>&lt;P&gt;Hello, device-side enqueue and on-device queues were required by OpenCL 2.x, but this is one of the features that became optional in OpenCL 3.0.&amp;nbsp; See:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;The updated description of&amp;nbsp;&lt;A href="https://www.khronos.org/registry/OpenCL/specs/3.0-unified/html/OpenCL_API.html#CL_DEVICE_MAX_ON_DEVICE_QUEUES" target="_self"&gt;CL_DEVICE_MAX_ON_DEVICE_QUEUES&lt;/A&gt;&amp;nbsp; in the OpenCL 3.0 spec.&lt;/LI&gt;
&lt;LI&gt;The specific section for&amp;nbsp;&lt;A href="https://www.khronos.org/registry/OpenCL/specs/3.0-unified/html/OpenCL_API.html#_device_side_enqueue" target="_self"&gt;device-side enqueue&lt;/A&gt;&amp;nbsp; in the OpenCL 3.0 backwards compatibility appendix.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;We support most of the optional OpenCL 3.0 features on our GPUs but this is one of the few we've dropped due to engineering and maintenance complexity and lack of adoption.&lt;/P&gt;
&lt;P&gt;If you can describe the particular use-case you are trying to solve with this feature we can try to suggest an alternative - thanks!&lt;/P&gt;</description>
      <pubDate>Fri, 03 Jun 2022 18:35:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1389908#M504</guid>
      <dc:creator>Ben_A_Intel</dc:creator>
      <dc:date>2022-06-03T18:35:05Z</dc:date>
    </item>
    <item>
      <title>Re:device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392562#M522</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We haven't heard back from you. Could you please provide an update on your issue?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Noorjahan.&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 15 Jun 2022 05:11:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392562#M522</guid>
      <dc:creator>NoorjahanSk_Intel</dc:creator>
      <dc:date>2022-06-15T05:11:55Z</dc:date>
    </item>
    <item>
      <title>Re: device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392594#M523</link>
      <description>&lt;P&gt;hello,&lt;/P&gt;
&lt;P&gt;thanks for the infos posted before.&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;i like to use "enqueue_kernel" command which requires queue_t parameter.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;&lt;A href="https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_C.html#enqueuing-kernels" target="_blank"&gt;https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_C.html#enqueuing-kernels&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;&lt;CODE data-lang="c"&gt;&amp;nbsp;&lt;/CODE&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;I try the examples , but it seems , that this function requires device queue.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;&lt;CODE data-lang="c"&gt;get_default_queue() always return 0;&lt;/CODE&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt; I wrote kernel with parameter queue_t as argument,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;but when i call clSetKernelArg with the queue Argument(host queue) is not accepted. &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;best regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;ANdreas&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Jun 2022 07:20:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392594#M523</guid>
      <dc:creator>Andreas4</dc:creator>
      <dc:date>2022-06-15T07:20:31Z</dc:date>
    </item>
    <item>
      <title>Re: device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392812#M526</link>
      <description>&lt;BLOCKQUOTE&gt;&lt;HR /&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/239505"&gt;@Andreas4&lt;/a&gt;&amp;nbsp;wrote:&lt;BR /&gt;
&lt;P&gt;&lt;SPAN class="sub_section_element_selectors"&gt;I try the examples , but it seems , that this function requires device queue.&lt;/SPAN&gt;&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;Hi, this is correct, and we do not support creating device queues on any of our GPUs with our latest drivers.&amp;nbsp; If you query&amp;nbsp;&lt;A href="https://www.khronos.org/registry/OpenCL/specs/3.0-unified/html/OpenCL_API.html#CL_DEVICE_DEVICE_ENQUEUE_CAPABILITIES" target="_self"&gt;CL_DEVICE_DEVICE_ENQUEUE_CAPABILITIES&lt;/A&gt;&amp;nbsp; you should see that we return zero, indicating that we do not support any of the device-side enqueue capabilities.&lt;/P&gt;
&lt;P&gt;Can you please describe what you are trying to solve with device-side enqueue and perhaps we can suggest an alternative?&lt;/P&gt;
&lt;P&gt;You may also want to try our CPU OpenCL device, which still supports device-side enqueue.&lt;/P&gt;</description>
      <pubDate>Wed, 15 Jun 2022 23:55:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1392812#M526</guid>
      <dc:creator>Ben_A_Intel</dc:creator>
      <dc:date>2022-06-15T23:55:06Z</dc:date>
    </item>
    <item>
      <title>Re:device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1393287#M531</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We haven't heard back from you. Could you please provide an update on your issue?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Noorjahan.&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 17 Jun 2022 04:44:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1393287#M531</guid>
      <dc:creator>NoorjahanSk_Intel</dc:creator>
      <dc:date>2022-06-17T04:44:23Z</dc:date>
    </item>
    <item>
      <title>Re:device queue Intel Iris Xe Graphics</title>
      <link>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1395597#M543</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We have not heard back from you, so we will close this inquiry now. If you need further assistance, please post a new question.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Noorjahan.&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Mon, 27 Jun 2022 08:53:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/GPU-Compute-Software/device-queue-Intel-Iris-Xe-Graphics/m-p/1395597#M543</guid>
      <dc:creator>NoorjahanSk_Intel</dc:creator>
      <dc:date>2022-06-27T08:53:21Z</dc:date>
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  </channel>
</rss>

