<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic DVO interface timing spec. in Graphics</title>
    <link>https://community.intel.com/t5/Graphics/DVO-interface-timing-spec/m-p/357924#M24042</link>
    <description>&lt;P&gt;DVO is an Intel standard, but I can't find any specifications anywhere for the timing. I need to generate the various signals (HSYNC, VSYNC, DE, Clk, data) that go into a DVI transmitter. Where the heck is this specified?&lt;/P&gt;</description>
    <pubDate>Thu, 18 Jun 2009 21:37:09 GMT</pubDate>
    <dc:creator>idata</dc:creator>
    <dc:date>2009-06-18T21:37:09Z</dc:date>
    <item>
      <title>DVO interface timing spec.</title>
      <link>https://community.intel.com/t5/Graphics/DVO-interface-timing-spec/m-p/357924#M24042</link>
      <description>&lt;P&gt;DVO is an Intel standard, but I can't find any specifications anywhere for the timing. I need to generate the various signals (HSYNC, VSYNC, DE, Clk, data) that go into a DVI transmitter. Where the heck is this specified?&lt;/P&gt;</description>
      <pubDate>Thu, 18 Jun 2009 21:37:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/DVO-interface-timing-spec/m-p/357924#M24042</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2009-06-18T21:37:09Z</dc:date>
    </item>
  </channel>
</rss>

