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    <title>topic Re: Some Graphics 5200 architecture configuration problems in Graphics</title>
    <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382914#M28384</link>
    <description>&lt;P&gt;Thank you, Sylvia. I'm also searching the answer.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About question 1, I find that the same 5200 GPU has different max frequency with different CPU. Maybe this relates to the CPU or some other features? So when we compute the GFlops, we should consider the CPU part.&lt;/P&gt;&lt;P&gt;&lt;A href="http://en.wikipedia.org/wiki/List_of_Intel_Core_i7_microprocessors"&gt;http://en.wikipedia.org/wiki/List_of_Intel_Core_i7_microprocessors&lt;/A&gt; List of Intel Core i7 microprocessors - Wikipedia, the free encyclopedia&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About question 2, the L1 and L2 cache are the sampler cache and is read only, I think this is different from the traditional L1 and L2 cache and I don't know how can use it properly in OpenCL programming. Do you have some advice?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not sure about question 3 and 4, actually, I'm not sure if there is 4 L3 cache slides and each is 1.5 MB?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you again, and happy new year！&lt;/P&gt;</description>
    <pubDate>Wed, 31 Dec 2014 17:00:24 GMT</pubDate>
    <dc:creator>zfeng6</dc:creator>
    <dc:date>2014-12-31T17:00:24Z</dc:date>
    <item>
      <title>Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382912#M28382</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a CPU of i7-4850HQ, which contains Graphics 5200. I am doing experiments on it and  have some parameter problems about it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Would some one tell me what is the  max Iris™ Pro 5200  Gen7.5 frequency? 1.3 GHz or 1.2 GHz? When I compute its Theoretical peak Gflops, which should I use?&lt;/P&gt;&lt;P&gt;In The Compute Architecture of  Intel® Processor Graphics Gen7.5 page 13, it writes &lt;B&gt;1.3 &lt;/B&gt;GHz.&lt;/P&gt;&lt;P&gt;&lt;A href="https://software.intel.com/sites/default/files/managed/4f/e0/Compute_Architecture_of_Intel_Processor_Graphics_Gen7dot5_A%E2%80%A6"&gt;https://software.intel.com/sites/default/files/managed/4f/e0/Compute_Architecture_of_Intel_Processor_Graphics_Gen7dot5_A%E2%80%A6&lt;/A&gt; &lt;A href="https://software.intel.com/sites/default/files/managed/4f/e0/Compute_Architecture_of_Intel_Processor_Graphics_Gen7dot5_A"&gt;https://software.intel.com/sites/default/files/managed/4f/e0/Compute_Architecture_of_Intel_Processor_Graphics_Gen7dot5_A&lt;/A&gt;…&lt;/P&gt;&lt;P&gt;But in the following url, it writes max freq. of GPU is&lt;B&gt; 1.2&lt;/B&gt; GHz.&lt;/P&gt;&lt;P&gt;&lt;A href="http://ark.intel.com/products/76086/Intel-Core-i7-4850HQ-Processor-6M-Cache-up-to-3_50-GHz"&gt;http://ark.intel.com/products/76086/Intel-Core-i7-4850HQ-Processor-6M-Cache-up-to-3_50-GHz&lt;/A&gt; ARK | Intel® Core™ i7-4850HQ Processor (6M Cache, up to 3.50 GHz)&lt;/P&gt;&lt;P&gt;I think one of them is wrong but I don't kinow.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.What is the size of the L1 and L2 cache in GPU for each subslice? Would you tell me where can I get this parameters?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3.GPU can directly read  and write from and to the EDRAM, CPU can directly access the LLC cache slice, so the CPU has faster speed to the LLC and slower speed to EDRAM, while GPU has faster speed to EDRAM and slower speed to LLC. Am I right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4.I read the Compute Architecture of  Intel® Processor Graphics Gen7.5 and I can get clear explanation of the GPU architecture. Would you tell me where I can get the CPU part architecture figure? Just a picture to explain the core, L1 cache, L2 cache structure clearly? Like the GPU part.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope for reply &lt;/P&gt;&lt;P&gt;i would appreciate it if you could help me.&lt;/P&gt;</description>
      <pubDate>Mon, 29 Dec 2014 17:03:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382912#M28382</guid>
      <dc:creator>zfeng6</dc:creator>
      <dc:date>2014-12-29T17:03:55Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382913#M28383</link>
      <description>&lt;P&gt;Thanks for the feedback Merlion. I'm going to provide this information to the corresponding department. &lt;/P&gt;&lt;P&gt;Regarding your questions, I'm going to try to get that information for you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'll keep you posted.&lt;/P&gt;</description>
      <pubDate>Tue, 30 Dec 2014 18:18:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382913#M28383</guid>
      <dc:creator>Silvia_L_Intel1</dc:creator>
      <dc:date>2014-12-30T18:18:43Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382914#M28384</link>
      <description>&lt;P&gt;Thank you, Sylvia. I'm also searching the answer.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About question 1, I find that the same 5200 GPU has different max frequency with different CPU. Maybe this relates to the CPU or some other features? So when we compute the GFlops, we should consider the CPU part.&lt;/P&gt;&lt;P&gt;&lt;A href="http://en.wikipedia.org/wiki/List_of_Intel_Core_i7_microprocessors"&gt;http://en.wikipedia.org/wiki/List_of_Intel_Core_i7_microprocessors&lt;/A&gt; List of Intel Core i7 microprocessors - Wikipedia, the free encyclopedia&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About question 2, the L1 and L2 cache are the sampler cache and is read only, I think this is different from the traditional L1 and L2 cache and I don't know how can use it properly in OpenCL programming. Do you have some advice?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not sure about question 3 and 4, actually, I'm not sure if there is 4 L3 cache slides and each is 1.5 MB?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you again, and happy new year！&lt;/P&gt;</description>
      <pubDate>Wed, 31 Dec 2014 17:00:24 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382914#M28384</guid>
      <dc:creator>zfeng6</dc:creator>
      <dc:date>2014-12-31T17:00:24Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382915#M28385</link>
      <description>&lt;P&gt;Hello Merlion, I found the following information for you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm still waiting for the information on questions 1 and 2. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For question 3 the information you gave us on your post is correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This is the best diagram of the processor that I found. At this moment, we have not released a detailed diagram for the L1/L2 cache architecture.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jan 2015 20:10:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382915#M28385</guid>
      <dc:creator>Silvia_L_Intel1</dc:creator>
      <dc:date>2015-01-07T20:10:47Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382916#M28386</link>
      <description>&lt;P&gt;Thanks, Sylvia. Thank you for your help.&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jan 2015 08:19:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382916#M28386</guid>
      <dc:creator>zfeng6</dc:creator>
      <dc:date>2015-01-08T08:19:13Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382917#M28387</link>
      <description>&lt;P&gt;Merlion this is the information I received regarding question # 4 &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;There are good descriptions published when Haswell launched.  Here is a good place to start: &lt;B&gt;&lt;I&gt;&lt;A href="http://www.realworldtech.com/haswell-cpu/"&gt;http://www.realworldtech.com/haswell-cpu/&lt;/A&gt; &lt;A href="http://www.realworldtech.com/haswell-cpu/"&gt;http://www.realworldtech.com/haswell-cpu/&lt;/A&gt;&lt;/I&gt;&lt;/B&gt;     &lt;B&gt;&lt;I&gt;&lt;/I&gt;&lt;/B&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;</description>
      <pubDate>Mon, 26 Jan 2015 21:02:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382917#M28387</guid>
      <dc:creator>Silvia_L_Intel1</dc:creator>
      <dc:date>2015-01-26T21:02:21Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382918#M28388</link>
      <description>&lt;P&gt;Thank you!&lt;/P&gt;</description>
      <pubDate>Fri, 30 Jan 2015 16:50:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382918#M28388</guid>
      <dc:creator>zfeng6</dc:creator>
      <dc:date>2015-01-30T16:50:54Z</dc:date>
    </item>
    <item>
      <title>Re: Some Graphics 5200 architecture configuration problems</title>
      <link>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382919#M28389</link>
      <description>&lt;P&gt;@ Merlion&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;  &lt;/P&gt;&lt;P&gt;Only the i7-&lt;B&gt;49xx&lt;/B&gt; series Iris Pro Graphics 5200 skus have a max dynamic frequency of 1.3GHz. The i7-&lt;B&gt;48xx&lt;/B&gt; and i7-&lt;B&gt;47xx&lt;/B&gt; Iris Pro Graphics skus are 1.2GHz. Hope this is helpful&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Robert&lt;/P&gt;&lt;P&gt;  &lt;/P&gt;</description>
      <pubDate>Mon, 02 Feb 2015 20:21:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Graphics/Some-Graphics-5200-architecture-configuration-problems/m-p/382919#M28389</guid>
      <dc:creator>ROBERT_U_Intel</dc:creator>
      <dc:date>2015-02-02T20:21:54Z</dc:date>
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