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    <title>topic Re: ippiMalloc stepsizes in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900068#M12618</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;the only difference between IPP mem allocation functions and C run-time memory allocation functions is alignment. The IPP memory allocation functions do align allocated memory block on 32-byte boundary, whereas C run time memory allocation susally algins block on 4-byte boundary.&lt;/P&gt;
&lt;P&gt;So, answer is yes, when you allocate images of the same size, IPP memory allocation functions will always align allocated memory block on 32-bytes boundary and so they will provide you the same step value.&lt;/P&gt;
&lt;P&gt;Note, alignment depends on processor u-arch features, and is choosen to provide the fastest access to memory block (keeping allocation overhead within reasonable range). That mean alignment may differs on different processor generations, for example between IA32 and Itanium. That does not necessary implemented right now, but that is possible in future.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt; Vladimir&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 24 Apr 2008 09:04:08 GMT</pubDate>
    <dc:creator>Vladimir_Dudnik</dc:creator>
    <dc:date>2008-04-24T09:04:08Z</dc:date>
    <item>
      <title>ippiMalloc stepsizes</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900067#M12617</link>
      <description>hi,&lt;BR /&gt;&lt;BR /&gt;i am about to use the pyramid functions for image fusing,&lt;BR /&gt;so i compute the gaussian and laplacian pyramids of two images.&lt;BR /&gt;question: do i have to keep track of all the stepsizes or can&lt;BR /&gt;i _safely_ assume that within one runtime environment&lt;BR /&gt;the stepsize of two equally sized images is the same?&lt;BR /&gt;to be more precise-- is this code "safe"&lt;BR /&gt;&lt;BR /&gt; ALPyr &lt;K&gt; := ippiMalloc_8u_C1 (ABRois &lt;K&gt;.width, ABRois &lt;K&gt;.height, @ABSteps &lt;K&gt;);&lt;BR /&gt; BLPyr &lt;K&gt; := ippiMalloc_8u_C1 (ABRois &lt;K&gt;.width, ABRois &lt;K&gt;.height, @ABSteps &lt;K&gt;);&lt;BR /&gt; FinalPyr &lt;K&gt; := ippiMalloc_8u_C1 (ABRois &lt;K&gt;.width, ABRois &lt;K&gt;.height, @ABSteps &lt;K&gt;);&lt;BR /&gt;&lt;BR /&gt;note that i allocate trice an image of equal size, and hence&lt;BR /&gt;do assume that they return the same stepsizes-- so safe or not?&lt;BR /&gt;&lt;BR /&gt;thanks in advance,&lt;BR /&gt;aydin&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;&lt;/K&gt;</description>
      <pubDate>Wed, 23 Apr 2008 14:05:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900067#M12617</guid>
      <dc:creator>ad_ms</dc:creator>
      <dc:date>2008-04-23T14:05:17Z</dc:date>
    </item>
    <item>
      <title>Re: ippiMalloc stepsizes</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900068#M12618</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;the only difference between IPP mem allocation functions and C run-time memory allocation functions is alignment. The IPP memory allocation functions do align allocated memory block on 32-byte boundary, whereas C run time memory allocation susally algins block on 4-byte boundary.&lt;/P&gt;
&lt;P&gt;So, answer is yes, when you allocate images of the same size, IPP memory allocation functions will always align allocated memory block on 32-bytes boundary and so they will provide you the same step value.&lt;/P&gt;
&lt;P&gt;Note, alignment depends on processor u-arch features, and is choosen to provide the fastest access to memory block (keeping allocation overhead within reasonable range). That mean alignment may differs on different processor generations, for example between IA32 and Itanium. That does not necessary implemented right now, but that is possible in future.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt; Vladimir&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 24 Apr 2008 09:04:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900068#M12618</guid>
      <dc:creator>Vladimir_Dudnik</dc:creator>
      <dc:date>2008-04-24T09:04:08Z</dc:date>
    </item>
    <item>
      <title>Re: ippiMalloc stepsizes</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900069#M12619</link>
      <description>&lt;P&gt;hi vladimir,&lt;/P&gt;
&lt;P&gt;thank your for your quick response. since my code does not depend on how the data is aligned, everything is ok for me.&lt;/P&gt;
&lt;P&gt;regards,&lt;BR /&gt;aydin&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 24 Apr 2008 09:48:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-stepsizes/m-p/900069#M12619</guid>
      <dc:creator>jhaenisch</dc:creator>
      <dc:date>2008-04-24T09:48:18Z</dc:date>
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