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    <title>topic ippsUpdateNoisePSDMCRA_32s_I implementation differences in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsUpdateNoisePSDMCRA-32s-I-implementation-differences/m-p/906502#M13563</link>
    <description>&lt;P&gt;When I try the "Ephraim-Malah Noise Suppressor" example (speech-recAudio-ProcessingNR_exmp) with IPP 5.0 or 5.1, I get different results on different processors.&lt;/P&gt;
&lt;P&gt;After hours of debugging I found the some implementations of the ippsUpdateNoisePSDMCRA_32s_I routine don't work correctly.&lt;/P&gt;
&lt;P&gt;When I try the generic (px) and Pentium III (a6) versions of this routine, the noise cancelled audio contains drops in amplitude, which is disturbing and distracting.&lt;/P&gt;
&lt;P&gt;When I use the SSE2 (w7) and SSE3 (t7) versions, this issue doesn't occur and the result is much better.&lt;/P&gt;
&lt;P&gt;Is this a known issue? &lt;/P&gt;
&lt;P&gt;I need at least a generic version of the routine that behaves like the SSE2 or SSE3 version.&lt;/P&gt;
&lt;P&gt;Thanks for any help!&lt;/P&gt;</description>
    <pubDate>Wed, 11 Oct 2006 07:39:50 GMT</pubDate>
    <dc:creator>adrennan</dc:creator>
    <dc:date>2006-10-11T07:39:50Z</dc:date>
    <item>
      <title>ippsUpdateNoisePSDMCRA_32s_I implementation differences</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsUpdateNoisePSDMCRA-32s-I-implementation-differences/m-p/906502#M13563</link>
      <description>&lt;P&gt;When I try the "Ephraim-Malah Noise Suppressor" example (speech-recAudio-ProcessingNR_exmp) with IPP 5.0 or 5.1, I get different results on different processors.&lt;/P&gt;
&lt;P&gt;After hours of debugging I found the some implementations of the ippsUpdateNoisePSDMCRA_32s_I routine don't work correctly.&lt;/P&gt;
&lt;P&gt;When I try the generic (px) and Pentium III (a6) versions of this routine, the noise cancelled audio contains drops in amplitude, which is disturbing and distracting.&lt;/P&gt;
&lt;P&gt;When I use the SSE2 (w7) and SSE3 (t7) versions, this issue doesn't occur and the result is much better.&lt;/P&gt;
&lt;P&gt;Is this a known issue? &lt;/P&gt;
&lt;P&gt;I need at least a generic version of the routine that behaves like the SSE2 or SSE3 version.&lt;/P&gt;
&lt;P&gt;Thanks for any help!&lt;/P&gt;</description>
      <pubDate>Wed, 11 Oct 2006 07:39:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsUpdateNoisePSDMCRA-32s-I-implementation-differences/m-p/906502#M13563</guid>
      <dc:creator>adrennan</dc:creator>
      <dc:date>2006-10-11T07:39:50Z</dc:date>
    </item>
    <item>
      <title>Re: ippsUpdateNoisePSDMCRA_32s_I implementation differences</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsUpdateNoisePSDMCRA-32s-I-implementation-differences/m-p/906503#M13564</link>
      <description>&lt;P&gt;Hello, it might be a bug in Pentium III optimized code in this function. Please report about that issue on &lt;A href="http://premier.intel.com"&gt;Intel Premier Support&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt; Vladimir&lt;/P&gt;</description>
      <pubDate>Thu, 12 Oct 2006 21:35:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsUpdateNoisePSDMCRA-32s-I-implementation-differences/m-p/906503#M13564</guid>
      <dc:creator>Vladimir_Dudnik</dc:creator>
      <dc:date>2006-10-12T21:35:06Z</dc:date>
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