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    <title>topic Xscale PXA272 in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Xscale-PXA272/m-p/917067#M15263</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;
&lt;P&gt;I am trying to development the PXA272. can you please let me know the SDram, Falsh, Sram need to connect to the buffer?. Why we need to have Sram in the design?&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Hoang&lt;/P&gt;</description>
    <pubDate>Fri, 14 Jul 2006 08:23:47 GMT</pubDate>
    <dc:creator>hoangy6k</dc:creator>
    <dc:date>2006-07-14T08:23:47Z</dc:date>
    <item>
      <title>Xscale PXA272</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Xscale-PXA272/m-p/917067#M15263</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;
&lt;P&gt;I am trying to development the PXA272. can you please let me know the SDram, Falsh, Sram need to connect to the buffer?. Why we need to have Sram in the design?&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Hoang&lt;/P&gt;</description>
      <pubDate>Fri, 14 Jul 2006 08:23:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Xscale-PXA272/m-p/917067#M15263</guid>
      <dc:creator>hoangy6k</dc:creator>
      <dc:date>2006-07-14T08:23:47Z</dc:date>
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