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    <title>topic Re: How  the g726 encode IPP functions  support PLC ? in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/How-the-g726-encode-IPP-functions-support-PLC/m-p/923350#M15919</link>
    <description>&lt;DIV&gt;&lt;/DIV&gt;&lt;P&gt;Hi, Norman.&lt;/P&gt;&lt;P&gt;You absolutely right about G.711 codec. It has got VAD and PLC blocks. They were taken from G.729.&lt;/P&gt;&lt;P&gt;As for G.726. It hasn't got PLC (Packet Lost Concealment). USC implementation of G.726 just emulates lost packets with zeros inbitsream. You can use this emulation just passing NULL "in" pointer to the Decode() function.&lt;/P&gt;&lt;P&gt;Igor S. Belyakov&lt;/P&gt;</description>
    <pubDate>Thu, 08 Jun 2006 19:21:31 GMT</pubDate>
    <dc:creator>Igor_B_Intel1</dc:creator>
    <dc:date>2006-06-08T19:21:31Z</dc:date>
    <item>
      <title>How  the g726 encode IPP functions  support PLC ?</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/How-the-g726-encode-IPP-functions-support-PLC/m-p/923349#M15918</link>
      <description>&lt;DIV&gt;Hi ,&lt;/DIV&gt;&lt;DIV&gt;we work on the codec sample code.&lt;/DIV&gt;&lt;DIV&gt;It seems the g711 support the PLC.&lt;/DIV&gt;&lt;DIV&gt;Is that correct ?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;How about the g726 ?&lt;/DIV&gt;&lt;DIV&gt;Because the encoding is&lt;/DIV&gt;&lt;DIV&gt;doing by a function ippsEncode_G726_16s8u&lt;/DIV&gt;&lt;DIV&gt;and it accept uniform PCM.&lt;/DIV&gt;&lt;DIV&gt;Is it the PLC need to bedone before the Encode function or&lt;/DIV&gt;&lt;DIV&gt;the Encode functioninclude some extra PLC&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks for anyone can answer this question&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;norman&lt;/DIV&gt;</description>
      <pubDate>Tue, 06 Jun 2006 02:08:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/How-the-g726-encode-IPP-functions-support-PLC/m-p/923349#M15918</guid>
      <dc:creator>sengacheng</dc:creator>
      <dc:date>2006-06-06T02:08:19Z</dc:date>
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    <item>
      <title>Re: How  the g726 encode IPP functions  support PLC ?</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/How-the-g726-encode-IPP-functions-support-PLC/m-p/923350#M15919</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;&lt;P&gt;Hi, Norman.&lt;/P&gt;&lt;P&gt;You absolutely right about G.711 codec. It has got VAD and PLC blocks. They were taken from G.729.&lt;/P&gt;&lt;P&gt;As for G.726. It hasn't got PLC (Packet Lost Concealment). USC implementation of G.726 just emulates lost packets with zeros inbitsream. You can use this emulation just passing NULL "in" pointer to the Decode() function.&lt;/P&gt;&lt;P&gt;Igor S. Belyakov&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2006 19:21:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/How-the-g726-encode-IPP-functions-support-PLC/m-p/923350#M15919</guid>
      <dc:creator>Igor_B_Intel1</dc:creator>
      <dc:date>2006-06-08T19:21:31Z</dc:date>
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