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    <title>topic Okay, I've figured it out! in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942650#M17811</link>
    <description>&lt;P&gt;Okay, I've figured it out!&lt;/P&gt;
&lt;P&gt;I needed to pad the forward FFT as well, thought it was just the inverse that needed padding.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 30 Sep 2013 19:40:43 GMT</pubDate>
    <dc:creator>daven-hughes</dc:creator>
    <dc:date>2013-09-30T19:40:43Z</dc:date>
    <item>
      <title>Avoiding Time Aliasing with FFTs</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942645#M17806</link>
      <description>&lt;P&gt;I am trying to design a convolution function with FFTs. The FFT functions state objects have fixed buffer sizes and I need to decouple the sizes of the input and output arrays to avoid time aliasing (wrapping).&amp;nbsp;&lt;/P&gt;
&lt;P&gt;First of all I know that there's an IppsConv function, but I need my own implementation for a few reasons.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The convolution operation takes input with size n and kernel with size m and produces an output vector with size n+m-1. Using an ippsFFT routine, you must specify in the state object the sizes of the input and output.&lt;/P&gt;
&lt;P&gt;Now, you can use separate state objects for forward FFT and inverse FFT, but in either case both input arrays are equal sizes, so different-order states will simply up- or down-sample the signal, not give you the 'tail' of the convolution.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Relevant code:&lt;/P&gt;
&lt;P&gt;[cpp]if(useFFT)&lt;/P&gt;
&lt;P&gt;{&lt;BR /&gt; ippsFFTFwd_RToCCS_32f (timeInput, (Ipp32f*) freqInput, stateOrder7, 0 );&lt;BR /&gt; ippsMul_32fc_I (freqImpulse + 1, freqInput + 1, inputSize / 2 );&lt;BR /&gt; ippsFFTInv_CCSToR_32f ((Ipp32f*) freqInput, convDest, stateOrder8, 0 );&lt;BR /&gt; }&lt;BR /&gt; else&lt;BR /&gt; {&lt;BR /&gt; ippsConv_32f(timeImpulse, kernelSize, timeInput, inputSize, convDest);&lt;BR /&gt; }[/cpp]&lt;/P&gt;
&lt;P&gt;I attached the results of using convolution and states with different orders.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 29 Sep 2013 22:14:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942645#M17806</guid>
      <dc:creator>daven-hughes</dc:creator>
      <dc:date>2013-09-29T22:14:51Z</dc:date>
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    <item>
      <title>I have a few comments:</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942646#M17807</link>
      <description>&lt;P&gt;I have a few comments:&lt;/P&gt;
&lt;P&gt;First of all, I know for sure that IPP image convolution functions internally switch to FFT when some size is larger than X.&lt;BR /&gt;Thus, you might now need to implement your own FFT for your vector...&lt;/P&gt;
&lt;P&gt;Second, to prevent time domain wrapping, simply append zeroes to your buffer. If you buffer is N and your kernel is M, then expand the buffer to&amp;nbsp; N+M-1 and put zeroes in at the right/bottom. Then FFT/DFT the entire buffer, and just use the left/top of the result.&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2013 06:45:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942646#M17807</guid>
      <dc:creator>Thomas_Jensen1</dc:creator>
      <dc:date>2013-09-30T06:45:43Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942647#M17808</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I haven't found any question in your post, so I guess that you just share your experience... There are a lot of different interesting FFT applications... To remove wrapping you can just cut an output from Conv function. For example ippsCrossCorr has a bit different API that makes possible to remove wrapping with correspoding input parameters like lowLag and dstLen.&lt;/P&gt;
&lt;P&gt;regards, Igor&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2013 08:08:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942647#M17808</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2013-09-30T08:08:55Z</dc:date>
    </item>
    <item>
      <title>Oh, I must have edited out my</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942648#M17809</link>
      <description>&lt;P&gt;Oh, I must have edited out my question.&lt;/P&gt;
&lt;P&gt;The question is how do I achieve the exaclty the same result as the ippsConv function with the usual convolution algorithm in frequency domain (fft input -&amp;gt; complex multiply kernel and input -&amp;gt; ifft)&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2013 13:24:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942648#M17809</guid>
      <dc:creator>daven-hughes</dc:creator>
      <dc:date>2013-09-30T13:24:29Z</dc:date>
    </item>
    <item>
      <title>Quote:Thomas Jensen wrote:</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942649#M17810</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Thomas Jensen wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;First of all, I know for sure that IPP image convolution functions internally switch to FFT when some size is larger than X.&lt;BR /&gt;Thus, you might now need to implement your own FFT for your vector...&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;There's a DSP convolution algorithm too - like I say I know about it, but I need a custom implementation.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Thomas Jensen wrote:&lt;BR /&gt;Second, to prevent time domain wrapping, simply append zeroes to your buffer. If you buffer is N and your kernel is M, then expand the buffer to&amp;nbsp; N+M-1 and put zeroes in at the right/bottom. Then FFT/DFT the entire buffer, and just use the left/top of the result.&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;I understand the theory, zero padding etc, but my problem is implementing it with the IPP functions.&lt;/P&gt;
&lt;P&gt;Basically, I don't know how to tell the FFTInv function "use order 7 for the input but use order 8+ (for padding) for the output." You can only give it one state object, with one order.&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2013 15:19:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942649#M17810</guid>
      <dc:creator>daven-hughes</dc:creator>
      <dc:date>2013-09-30T15:19:28Z</dc:date>
    </item>
    <item>
      <title>Okay, I've figured it out!</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942650#M17811</link>
      <description>&lt;P&gt;Okay, I've figured it out!&lt;/P&gt;
&lt;P&gt;I needed to pad the forward FFT as well, thought it was just the inverse that needed padding.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2013 19:40:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Avoiding-Time-Aliasing-with-FFTs/m-p/942650#M17811</guid>
      <dc:creator>daven-hughes</dc:creator>
      <dc:date>2013-09-30T19:40:43Z</dc:date>
    </item>
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