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    <title>topic Hello. in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963502#M19887</link>
    <description>&lt;P&gt;Hello.&lt;/P&gt;

&lt;P&gt;The 1-tap filter was an example I plan to use longer ones but the memory usage grows too rapidly with each tap.&lt;/P&gt;

&lt;P&gt;Thanks for clarifying this, I guess that I'll have to implement my own FIR.&lt;/P&gt;

&lt;P&gt;Michal&lt;/P&gt;</description>
    <pubDate>Tue, 20 May 2014 13:10:30 GMT</pubDate>
    <dc:creator>Michal_B_Intel</dc:creator>
    <dc:date>2014-05-20T13:10:30Z</dc:date>
    <item>
      <title>IPP 8.1 - ippsFIRGetStateSize_32f</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963497#M19882</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;I have a question about FIR filtering functionality. When I ask for the FIR state buffer size using method below:&lt;/P&gt;&lt;PRE class="brush:cpp;"&gt;ippsFIRGetStateSize_32f( int tapsLen, int *pBufferSize )&lt;/PRE&gt;
&lt;P&gt;I get unusually huge values e. g. 17792 for tapsLen=1. Is this expected? From what I understood from documentation the FIR state structure contains taps values and delay buffer. I see no reason why this should be this big.&lt;/P&gt;</description>
      <pubDate>Fri, 28 Mar 2014 09:10:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963497#M19882</guid>
      <dc:creator>Michal_B_Intel</dc:creator>
      <dc:date>2014-03-28T09:10:39Z</dc:date>
    </item>
    <item>
      <title>Hi Michal,What is the</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963498#M19883</link>
      <description>&lt;P&gt;Hi Michal,&lt;/P&gt;
&lt;P&gt;What is the processor you find the problem?&amp;nbsp; Is it a 32 bit code, or Intel 64 bit code?&lt;/P&gt;
&lt;P&gt;Thanks,&lt;BR /&gt;Chao&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 31 Mar 2014 03:24:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963498#M19883</guid>
      <dc:creator>Chao_Y_Intel</dc:creator>
      <dc:date>2014-03-31T03:24:32Z</dc:date>
    </item>
    <item>
      <title>It's 64-bit.
Michal</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963499#M19884</link>
      <description>&lt;P&gt;It's 64-bit.&lt;/P&gt;

&lt;P&gt;Michal&lt;/P&gt;</description>
      <pubDate>Mon, 31 Mar 2014 07:05:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963499#M19884</guid>
      <dc:creator>Michal_B_Intel</dc:creator>
      <dc:date>2014-03-31T07:05:54Z</dc:date>
    </item>
    <item>
      <title>Hello,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963500#M19885</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Is there any chance for an update on this issue?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Michal&lt;/P&gt;</description>
      <pubDate>Mon, 19 May 2014 11:14:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963500#M19885</guid>
      <dc:creator>Michal_B_Intel</dc:creator>
      <dc:date>2014-05-19T11:14:50Z</dc:date>
    </item>
    <item>
      <title>HI Michal,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963501#M19886</link>
      <description>&lt;P&gt;HI Michal,&lt;/P&gt;

&lt;P&gt;I guess that for 1 tap FIR it's better to use ippsMulC_32f function :)&lt;/P&gt;

&lt;P&gt;As the same state structure is used for in-place and out-of-place FIR processing functions, the main part of this state structure is temporal buffer for in-place function - 4K floats = 16K bytes.&lt;/P&gt;

&lt;P&gt;regards, Igor&lt;/P&gt;</description>
      <pubDate>Mon, 19 May 2014 15:43:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963501#M19886</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2014-05-19T15:43:20Z</dc:date>
    </item>
    <item>
      <title>Hello.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963502#M19887</link>
      <description>&lt;P&gt;Hello.&lt;/P&gt;

&lt;P&gt;The 1-tap filter was an example I plan to use longer ones but the memory usage grows too rapidly with each tap.&lt;/P&gt;

&lt;P&gt;Thanks for clarifying this, I guess that I'll have to implement my own FIR.&lt;/P&gt;

&lt;P&gt;Michal&lt;/P&gt;</description>
      <pubDate>Tue, 20 May 2014 13:10:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963502#M19887</guid>
      <dc:creator>Michal_B_Intel</dc:creator>
      <dc:date>2014-05-20T13:10:30Z</dc:date>
    </item>
    <item>
      <title>Hi Michal,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963503#M19888</link>
      <description>&lt;P&gt;Hi Michal,&lt;/P&gt;

&lt;P&gt;did you receive my private message for you?&lt;/P&gt;

&lt;P&gt;regards, Igor&lt;/P&gt;</description>
      <pubDate>Wed, 28 May 2014 14:14:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/IPP-8-1-ippsFIRGetStateSize-32f/m-p/963503#M19888</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2014-05-28T14:14:52Z</dc:date>
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