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    <title>topic why ippsMalloc_64f function change default value of float.epsilon? in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041671#M23823</link>
    <description>&lt;P&gt;I have a C++ project &amp;nbsp;using Intel Compile, this project is called A.&lt;BR /&gt;
	This A project have 2 functions ( X&amp;amp; Y). Output of A project is dll and export 2 functions.&lt;BR /&gt;
	I have another C# project which imports 2 functions (X&amp;amp;Y) of A project, the project is called B.&lt;BR /&gt;
	The B project calls X function, doesn't call Y function.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;While executing B project, a bug occurred. The bug caused changing the default value of float.Epsilon from 1.401298E-45 to zero. It seem lose last bit mantissa of float.epsilon.&lt;BR /&gt;
	When I remove Y function from A project, B project will execute normally.&lt;BR /&gt;
	The Y function of A project &amp;nbsp;has only 1 line code to allocate memory by using ippsMalloc_64f function.&lt;BR /&gt;
	I don't know root cause of this bug. Could you please help me?&lt;/P&gt;</description>
    <pubDate>Mon, 09 Mar 2015 03:11:57 GMT</pubDate>
    <dc:creator>tran_l_</dc:creator>
    <dc:date>2015-03-09T03:11:57Z</dc:date>
    <item>
      <title>why ippsMalloc_64f function change default value of float.epsilon?</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041671#M23823</link>
      <description>&lt;P&gt;I have a C++ project &amp;nbsp;using Intel Compile, this project is called A.&lt;BR /&gt;
	This A project have 2 functions ( X&amp;amp; Y). Output of A project is dll and export 2 functions.&lt;BR /&gt;
	I have another C# project which imports 2 functions (X&amp;amp;Y) of A project, the project is called B.&lt;BR /&gt;
	The B project calls X function, doesn't call Y function.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;While executing B project, a bug occurred. The bug caused changing the default value of float.Epsilon from 1.401298E-45 to zero. It seem lose last bit mantissa of float.epsilon.&lt;BR /&gt;
	When I remove Y function from A project, B project will execute normally.&lt;BR /&gt;
	The Y function of A project &amp;nbsp;has only 1 line code to allocate memory by using ippsMalloc_64f function.&lt;BR /&gt;
	I don't know root cause of this bug. Could you please help me?&lt;/P&gt;</description>
      <pubDate>Mon, 09 Mar 2015 03:11:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041671#M23823</guid>
      <dc:creator>tran_l_</dc:creator>
      <dc:date>2015-03-09T03:11:57Z</dc:date>
    </item>
    <item>
      <title>Hi, </title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041672#M23824</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks for your report. We will has further check. &amp;nbsp;&lt;BR /&gt;
	btw, when you adding the &amp;nbsp;Y functions, do you notice any change in float point &amp;nbsp;control register? &amp;nbsp;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks,&lt;BR /&gt;
	Chao&lt;/P&gt;</description>
      <pubDate>Mon, 16 Mar 2015 05:47:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041672#M23824</guid>
      <dc:creator>Chao_Y_Intel</dc:creator>
      <dc:date>2015-03-16T05:47:28Z</dc:date>
    </item>
    <item>
      <title>Hi.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041673#M23825</link>
      <description>&lt;P&gt;Hi.&lt;/P&gt;

&lt;P&gt;ippsMalloc_64f can't lead to changes you've described above - it's just a wrapper above run-time malloc() that just aligns allocated buffer, and doesn't use at least 1 FP instruction. Could you provide a reproducer of this issue?&lt;/P&gt;

&lt;P&gt;regards, Igor&lt;/P&gt;</description>
      <pubDate>Mon, 16 Mar 2015 08:37:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041673#M23825</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2015-03-16T08:37:40Z</dc:date>
    </item>
    <item>
      <title>I already knew the reason of</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041674#M23826</link>
      <description>&lt;DIV&gt;
	&lt;DIV dir="ltr" id="imcontent"&gt;
		&lt;DIV dir="ltr"&gt;&lt;SPAN dir="ltr" style="word-wrap:break-word;font-size:10pt;font-family:'Segoe UI';color:#000000;direction:ltr"&gt;&lt;SPAN dir="ltr" style="font-size: 10pt; direction: ltr;"&gt;I already knew the reason of changing&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;Single.Epsilon's&amp;nbsp;&lt;/SPAN&gt;value into zero.&lt;BR /&gt;
			The reason is &amp;nbsp;when call a function in IPP DLL on program, the progress loading ipp dll have change FZ(bit15) in MXCSR register &amp;nbsp;to 1.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;

		&lt;DIV dir="ltr"&gt;&lt;SPAN dir="ltr" style="word-wrap:break-word;font-size:10pt;font-family:'Segoe UI';color:#000000;direction:ltr"&gt;&lt;SPAN dir="ltr" style="font-size: 10pt; direction: ltr;"&gt;So, I have more questions about this.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;

		&lt;DIV dir="ltr"&gt;&lt;SPAN dir="ltr" style="word-wrap:break-word;font-size:10pt;font-family:'Segoe UI';color:#000000;direction:ltr"&gt;&lt;SPAN dir="ltr" style="font-size: 10pt; direction: ltr;"&gt;How can the program set&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15)&lt;/SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;to 1 in&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;MXCSR register? And why?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;

		&lt;DIV dir="ltr"&gt;&lt;SPAN dir="ltr" style="word-wrap:break-word;font-size:10pt;font-family:'Segoe UI';color:#000000;direction:ltr"&gt;&lt;SPAN dir="ltr" style="font-size: 10pt; direction: ltr;"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;Besides, is there some way to&lt;/SPAN&gt;&amp;nbsp;prevent for setting&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15)&lt;/SPAN&gt;&amp;nbsp;to 1&lt;/SPAN&gt;?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;

		&lt;DIV dir="ltr"&gt;&lt;STRONG&gt;&lt;SPAN style="color: rgb(0, 0, 0); font-family: 'Segoe UI'; font-size: 13.3333330154419px; line-height: 20px;"&gt;Does the program set&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN dir="ltr" style="color: rgb(0, 0, 0); font-family: 'Segoe UI'; font-size: 13.3333330154419px; line-height: 20px; direction: ltr;"&gt;FZ(bit15)'s value when it loads dll of IPP project (c&lt;SPAN dir="ltr" style="direction: ltr;"&gt;all method of IPP project at the 1st time)&lt;/SPAN&gt;?&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/DIV&gt;

		&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
	&lt;/DIV&gt;
&lt;/DIV&gt;

&lt;DIV&gt;
	&lt;DIV dir="ltr" id="imcontent"&gt;&lt;SPAN dir="ltr" style="word-wrap:break-word;font-size:10pt;font-family:'Segoe UI';color:#000000;direction:ltr"&gt;By the way, I also created the sample for confirming&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15).&lt;/SPAN&gt;&amp;nbsp;&lt;BR /&gt;
		In some words, I summarize main steps in the sample as below.&lt;BR /&gt;
		- Call method of IPP project at the 1st time (at this time,&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15)&lt;/SPAN&gt;&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;&lt;SPAN dir="ltr" style="direction:ltr"&gt;is set to 1&lt;/SPAN&gt;&amp;nbsp;in&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;MXCSR register&lt;/SPAN&gt;&lt;/SPAN&gt;)&lt;BR /&gt;
		- Use C code in order to reset&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15)&lt;/SPAN&gt;&amp;nbsp;to 0 with&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;method _mm_setcsr().&lt;BR /&gt;
		- When I call method of IPP project at the 2nd time,&amp;nbsp;&lt;SPAN dir="ltr" style="direction:ltr"&gt;FZ(bit15)&lt;/SPAN&gt;&amp;nbsp;is still 0.&lt;BR /&gt;
		For more details, please refer to the attached file.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Wed, 24 Jun 2015 07:44:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041674#M23826</guid>
      <dc:creator>tran_l_</dc:creator>
      <dc:date>2015-06-24T07:44:06Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041675#M23827</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;FTZ mode is set by Intel compiler in the init(section) that is called before dllmain() - it's default compiler behavior if &lt;SPAN lang="EN-US" style="font-family: &amp;quot;Calibri&amp;quot;,sans-serif; font-size: 11pt; mso-fareast-font-family: Calibri; mso-fareast-theme-font: minor-latin; mso-bidi-font-family: &amp;quot;Times New Roman&amp;quot;; mso-ansi-language: EN-US; mso-fareast-language: EN-US; mso-bidi-language: AR-SA;"&gt;&lt;FONT color="#000000"&gt;"-fp:precise" switch is not used. (IPP is built with Intel compiler.) In your case you can set this bit to the state you need at the very beginning of your application with call to &lt;/FONT&gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;IPPAPI( IppStatus, ippSetFlushToZero, ( int value, unsigned int* pUMask ))&lt;BR /&gt;
	//&amp;nbsp; Arguments:&lt;BR /&gt;
	//&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; value&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; - !0 or 0 - set or clear the corresponding bit of MXCSR&lt;BR /&gt;
	//&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pUMask&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; - pointer to user store current underflow exception mask&lt;BR /&gt;
	//&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ( may be NULL if don't want to store )&lt;BR /&gt;
	//&lt;BR /&gt;
	//&amp;nbsp; Return:&lt;BR /&gt;
	//&amp;nbsp;&amp;nbsp; ippStsNoErr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; - Ok&lt;BR /&gt;
	//&amp;nbsp;&amp;nbsp; ippStsCpuNotSupportedErr - the mode is not suppoted&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN lang="EN-US" style="font-family: &amp;quot;Calibri&amp;quot;,sans-serif; font-size: 11pt; mso-fareast-font-family: Calibri; mso-fareast-theme-font: minor-latin; mso-bidi-font-family: &amp;quot;Times New Roman&amp;quot;; mso-ansi-language: EN-US; mso-fareast-language: EN-US; mso-bidi-language: AR-SA;"&gt;&lt;FONT color="#000000"&gt;that is defined in the ippcore.h&lt;/FONT&gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN lang="EN-US" style="font-family: &amp;quot;Calibri&amp;quot;,sans-serif; font-size: 11pt; mso-fareast-font-family: Calibri; mso-fareast-theme-font: minor-latin; mso-bidi-font-family: &amp;quot;Times New Roman&amp;quot;; mso-ansi-language: EN-US; mso-fareast-language: EN-US; mso-bidi-language: AR-SA;"&gt;&lt;FONT color="#000000"&gt;regards, Igor&lt;/FONT&gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 24 Jun 2015 08:09:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041675#M23827</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2015-06-24T08:09:26Z</dc:date>
    </item>
    <item>
      <title>1. About setting "-fp:precise</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041676#M23828</link>
      <description>&lt;P&gt;1. About setting "-fp:precise". I tried to set in Configuration Properties &amp;gt; C/C++ &amp;gt; Code Generation &amp;gt; Floating Point Model&lt;BR /&gt;
	- when I set&amp;nbsp;Floating Point Model to&amp;nbsp;"-fp:precise", FZ(bit15) is set to 1 after calling method of IPP.&lt;BR /&gt;
	- when I set&amp;nbsp;Floating Point Model&amp;nbsp;to "fp:strict" or "fp:fast", FZ(bit15) is still set 1 after calling method of IPP.&lt;BR /&gt;
	(Environment: Windows 7, 64 bit)&lt;BR /&gt;
	&lt;BR /&gt;
	2. If i use ippSetFlushToZero to reset FZ(bit15) to 0, is there any problems apart from default case (FZ(bit15) = 1)?&lt;BR /&gt;
	For example,&amp;nbsp;decrease&amp;nbsp;in peformance, wrong result of&amp;nbsp;IPP methods'&amp;nbsp;calculation process, etc.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;3.Is there any solution better than&amp;nbsp;above-mentioned solutions?&lt;BR /&gt;
	For example, I tried to do following steps.&lt;BR /&gt;
	- before calling methods of IPP, I set FZ(bit15) to 1.&lt;BR /&gt;
	- after calling methods of IPP, I reset FZ(bit15) to 0.&lt;BR /&gt;
	With this way, it will be processed same as default case. It means that IPP methods' process will be operated by enabling "flush to zero" mode (FZ(bit15) is 1).&amp;nbsp;&lt;/P&gt;

&lt;P&gt;If you have any suggestion for this case, please contact me. Thank you for your support.&lt;/P&gt;</description>
      <pubDate>Fri, 26 Jun 2015 04:50:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041676#M23828</guid>
      <dc:creator>tran_l_</dc:creator>
      <dc:date>2015-06-26T04:50:04Z</dc:date>
    </item>
    <item>
      <title>You don't need to set fp</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041677#M23829</link>
      <description>&lt;P&gt;You don't need to set fp:precise - I've said that IPP is built without this switch and FTZ bit is set to 1 in the IPP dllMailn() function - this behavior can't be changed in your app. You should not always switch this bit off/on before/after each IPP call - you should do this only once after IPP DLL has been loaded and initialized. This bit doesn't affect correctness of IPP functions, in some rare cases it can affect performance only. For example IIR functions behavior strongly depends on coefficients and input data because of feedback dependency and limited FP accuracy (23 bit mantissa for 32f and 53 bit for 64f - therefore rounding is performed after each add or mul operation) - therefore it is very easy to go out from normalized FP numbers representation to over/underflow - in this case, if FTZ is == 1, HW operates with such numbers as with zeroes (normal speed execution) while if FTZ is not set&amp;nbsp;- HW continues trying to obtain the most correct result - and in this case instead of simple add or&amp;nbsp;mul instruction execution&amp;nbsp;CPU invokes special subroutine from its ROM that can lead to significant performance degradation. Such cases are very rare if correct algorithms and data are used. If you meet significant unexpected perf degradation in some piece of your FP code because of under/overflows of FP numbers you use - you should reconsider algorithm, coefficients, data range, etc., or should set FTZ and DAZ bits to 1. Intel compiler without fp:precise switch sometimes generates speculative but fast code and sets FTZ to 1 in order&amp;nbsp;to avoid any slowdown because of reasons described above.&lt;/P&gt;

&lt;P&gt;regards, Igor.&lt;/P&gt;</description>
      <pubDate>Fri, 26 Jun 2015 08:30:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041677#M23829</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2015-06-26T08:30:41Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041678#M23830</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;In order to set FTZ = 0, I tried to set&amp;nbsp;the FTZ flag as instruction of below page:&amp;nbsp;&lt;A href="https://software.intel.com/sites/products/documentation/doclib/iss/2013/compiler/cpp-lin/GUID-1659EAE1-583E-44EE-BDEA-7C68C46061C7.htm"&gt;https://software.intel.com/sites/products/documentation/doclib/iss/2013/compiler/cpp-lin/GUID-1659EAE1-583E-44EE-BDEA-7C68C46061C7.htm&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;I do the following steps:&lt;/P&gt;

&lt;P&gt;- Open&amp;nbsp;Configuration Properties &amp;gt; C/C++ &amp;gt;&amp;nbsp;Command Line&lt;/P&gt;

&lt;P&gt;- Add "/Qftz-" to field "Additional Options". Click OK&lt;/P&gt;

&lt;P&gt;But when I rebuild the project, the output is&lt;/P&gt;

&lt;P&gt;"1&amp;gt;icl: command line remark #10148: option '/Qftz-' not supported" and cannot set FTZ = 0 (*)&lt;/P&gt;

&lt;P&gt;Could you please tell me the below questions:&lt;/P&gt;

&lt;OL&gt;
	&lt;LI&gt;The way to set FTZ = 0 as the page is OK, isn’t it?&lt;/LI&gt;
	&lt;LI&gt;Is my setting method correct?&lt;/LI&gt;
	&lt;LI&gt;Please tell me the reason of the error (*) when rebuild the project and how to fix it. The reason is version of IPP, isn’t it?&lt;BR /&gt;
		&lt;SPAN style="font-size: 13.0080003738403px; line-height: 19.5120010375977px;"&gt;(I use: Visual Studio 2008 SP1, Intel Parallel Studio 2011)&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/OL&gt;

&lt;P&gt;Thank you for your support.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 01 Jul 2015 10:14:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041678#M23830</guid>
      <dc:creator>tran_l_</dc:creator>
      <dc:date>2015-07-01T10:14:00Z</dc:date>
    </item>
    <item>
      <title>Hi, </title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041679#M23831</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Can you check the following following IPP API to enable/disable FTZ setting in your code:&amp;nbsp;&lt;BR /&gt;
	&lt;SPAN class="kwd" style="box-sizing: border-box; font-family: 'Courier New', Courier, monospace; color: rgb(102, 102, 102); font-size: 13px; line-height: 18.2000007629395px;"&gt;ippSetFlushToZero(int&lt;/SPAN&gt;&lt;SPAN style="color: rgb(102, 102, 102); font-family: Arial, Tahoma, Helvetica, sans-serif; font-size: 13px; line-height: 18.2000007629395px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class="var" style="box-sizing: border-box; font-style: italic; font-family: 'Courier New', Courier, monospace; color: rgb(102, 102, 102); font-size: 13px; line-height: 18.2000007629395px;"&gt;value&lt;/SPAN&gt;&lt;SPAN class="kwd" style="box-sizing: border-box; font-family: 'Courier New', Courier, monospace; color: rgb(102, 102, 102); font-size: 13px; line-height: 18.2000007629395px;"&gt;, unsigned int*&lt;/SPAN&gt;&lt;SPAN style="color: rgb(102, 102, 102); font-family: Arial, Tahoma, Helvetica, sans-serif; font-size: 13px; line-height: 18.2000007629395px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class="var" style="box-sizing: border-box; font-style: italic; font-family: 'Courier New', Courier, monospace; color: rgb(102, 102, 102); font-size: 13px; line-height: 18.2000007629395px;"&gt;pUMask&lt;/SPAN&gt;&lt;SPAN class="delim" style="box-sizing: border-box; font-family: 'Courier New', Courier, monospace; color: rgb(102, 102, 102); font-size: 13px; line-height: 18.2000007629395px;"&gt;);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Thanks,&lt;BR /&gt;
	Chao&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 03 Jul 2015 02:31:03 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/why-ippsMalloc-64f-function-change-default-value-of-float/m-p/1041679#M23831</guid>
      <dc:creator>Chao_Y_Intel</dc:creator>
      <dc:date>2015-07-03T02:31:03Z</dc:date>
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