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    <title>topic Hi Ashish, in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070332#M24524</link>
    <description>&lt;P&gt;Hi Ashish,&lt;/P&gt;

&lt;P&gt;I am afraid if two process(block1 &amp;amp; block2) could response same output? Could you please provide a test case, I will test and reproduce.&amp;nbsp;Thank you.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;BR /&gt;
	Fiona&lt;/P&gt;</description>
    <pubDate>Mon, 12 Sep 2016 08:54:27 GMT</pubDate>
    <dc:creator>Zhen_Z_Intel</dc:creator>
    <dc:date>2016-09-12T08:54:27Z</dc:date>
    <item>
      <title>Performance impact of step size</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070331#M24523</link>
      <description>&lt;P&gt;Imagine I have a pipline:&lt;/P&gt;

&lt;P&gt;&amp;lt;&lt;SPAN style="font-size: 9.64638px; line-height: 14.4696px;"&gt;blockquote&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Image in Row Major - Process block 1 - Convert image to col major (transpose) - Process block 2&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12.195px; line-height: 18.2925px;"&gt;&amp;lt;&lt;/SPAN&gt;&lt;SPAN style="font-size: 9.64638px; line-height: 14.4696px;"&gt;blockquote&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Now, I can use IPP functions in either stage (1 or 2) by specifying the appropriate step size (1 or width of image) for source and destination images.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;What is the performance impact if any? I tried an experiment with&amp;nbsp;&lt;SPAN style="color: rgb(0, 0, 0); font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 16px; line-height: normal;"&gt;ippiResizeAntialiasing_8u_C1R, &lt;/SPAN&gt;&lt;SPAN style="font-size: 12.195px; line-height: 18.2925px;"&gt;and I did not notice any significant performance difference (ipp 9.0, glnxa64, avx). Doing it in process block 1 (with step size ==1) had a very minor win over doing a similar operation in process block 2 (with step size == width of image).&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Does this hold for all ipp functions? Or are there functions where the step size (and associated row/col majorness) will have a significant impact on a library function's performance?&lt;/P&gt;</description>
      <pubDate>Thu, 08 Sep 2016 21:00:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070331#M24523</guid>
      <dc:creator>Ashish_U_</dc:creator>
      <dc:date>2016-09-08T21:00:54Z</dc:date>
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    <item>
      <title>Hi Ashish,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070332#M24524</link>
      <description>&lt;P&gt;Hi Ashish,&lt;/P&gt;

&lt;P&gt;I am afraid if two process(block1 &amp;amp; block2) could response same output? Could you please provide a test case, I will test and reproduce.&amp;nbsp;Thank you.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;BR /&gt;
	Fiona&lt;/P&gt;</description>
      <pubDate>Mon, 12 Sep 2016 08:54:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070332#M24524</guid>
      <dc:creator>Zhen_Z_Intel</dc:creator>
      <dc:date>2016-09-12T08:54:27Z</dc:date>
    </item>
    <item>
      <title>Fiona,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070333#M24525</link>
      <description>&lt;P&gt;Fiona,&lt;/P&gt;

&lt;P&gt;My question is a general one, not really related to any specific IPP function.&lt;/P&gt;

&lt;P&gt;In general, for any IPP function that needs a source and destination step size (e.g. ippiFilter_64f_C1R)&amp;nbsp;does the value of the step size have any impact on the performance?&amp;nbsp;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;If source step = 1, I assume achieving cache localization is easier than when its the image width.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Ashish&lt;/P&gt;</description>
      <pubDate>Mon, 12 Sep 2016 15:02:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070333#M24525</guid>
      <dc:creator>Ashish_U_</dc:creator>
      <dc:date>2016-09-12T15:02:21Z</dc:date>
    </item>
    <item>
      <title>Hi Ashish,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070334#M24526</link>
      <description>&lt;P&gt;Hi Ashish,&lt;/P&gt;

&lt;P&gt;The impact of step depends on size of your image, it is start point of consecutive lines of image. If you would like to zoom in/zoom out image with equal proportion. The step should be equals to width of src image/ dst image. If you set step to 1, could you make sure the output is correct? I am afraid the process of Block 1 &amp;amp; Block 2 could not do similar functionality. Could you please provide a test case, even input is a small matrix to see the output.&lt;/P&gt;

&lt;P&gt;I simulate your process to create a test case, the output of process 1 &amp;amp; process 2 are different. You could check with attached code, is that what you mean? If it is, how the performance&amp;nbsp;&lt;SPAN style="font-size: 13.008px;"&gt;could&lt;/SPAN&gt;&amp;nbsp;be compared that they do different work? I feel a bit confused, please provide your test case, or modify directly in attached file. Thank you.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;BR /&gt;
	Fiona&lt;/P&gt;</description>
      <pubDate>Tue, 13 Sep 2016 06:33:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070334#M24526</guid>
      <dc:creator>Zhen_Z_Intel</dc:creator>
      <dc:date>2016-09-13T06:33:17Z</dc:date>
    </item>
    <item>
      <title>Fiona, thanks for taking the</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070335#M24527</link>
      <description>&lt;P&gt;Fiona, thanks for taking the time to write a test case. From a quick look, I think you will also need to flip the destination size specification in the second call.&amp;nbsp;&lt;SPAN style="font-size: 12.195px; line-height: 18.2925px;"&gt;I'll edit it to explain better what I mean&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;In the meantime, I want to reiterate that this is a conceptual question about the impact of source and destination step value on the execution performance.&lt;/P&gt;

&lt;P&gt;1. 8x4 image in row major -&amp;gt; IPP function call (step size ==1) -&amp;gt; transpose -&amp;gt; output image&lt;/P&gt;

&lt;P&gt;2. 8x4 image in row major -&amp;gt; transpose-&amp;gt; IPP function (step size==4) -&amp;gt;(potentially another transpose) -&amp;gt; output image&lt;/P&gt;

&lt;P&gt;If step size ==1, then accessing successive pixels for a single raster is very cache friendly, if its large, like the image width, then I dont except the read/data access to be as cache friendly. I am wondering if IPP does anything special in its implementation to differentiate between step size ==1 and everything else.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Sep 2016 19:21:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070335#M24527</guid>
      <dc:creator>Ashish_U_</dc:creator>
      <dc:date>2016-09-13T19:21:00Z</dc:date>
    </item>
    <item>
      <title>Never mind - I think I</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070336#M24528</link>
      <description>&lt;P&gt;Never mind - I think I completely misunderstood the implication of source step between row and column.&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;(i.e it doesnt matter, its just the length of the first dimension - whatever that happens to be row or column).&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12.195px; line-height: 18.2925px;"&gt;Apologies, and thanks for your patience Fiona!&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 16 Sep 2016 21:19:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Performance-impact-of-step-size/m-p/1070336#M24528</guid>
      <dc:creator>Ashish_U_</dc:creator>
      <dc:date>2016-09-16T21:19:04Z</dc:date>
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