<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic HI Dimitry, in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072811#M24569</link>
    <description>&lt;P&gt;HI Dimitry,&lt;/P&gt;

&lt;P&gt;A new IPP resize automatically defines a pixel step using input ROIs. To define a pixel step externally you can use WarpAffine functions.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;BR /&gt;
	Valentin&lt;/P&gt;</description>
    <pubDate>Mon, 10 Apr 2017 09:46:08 GMT</pubDate>
    <dc:creator>Valentin_K_Intel</dc:creator>
    <dc:date>2017-04-10T09:46:08Z</dc:date>
    <item>
      <title>ippiResizeLinear missing factorx, factory</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072809#M24567</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;In previous ipp resize function there was possibility to specify float factor for X and Y .&lt;/P&gt;

&lt;P&gt;In new&amp;nbsp;ippiResizeLinear all ROI values are int so if desire step 1.6f it could be 1.6 for x and 1.57 for y.&lt;/P&gt;

&lt;P&gt;Do you know anyway to ensure the factor for X &amp;amp; Y equal ??&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 03 Apr 2017 12:46:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072809#M24567</guid>
      <dc:creator>Dimitry_N_Intel</dc:creator>
      <dc:date>2017-04-03T12:46:51Z</dc:date>
    </item>
    <item>
      <title>Duplicated issue in ISVC.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072810#M24568</link>
      <description>&lt;P&gt;Duplicated issue in ISVC.&lt;/P&gt;

&lt;P&gt;Will update or post resolution when done.&lt;/P&gt;</description>
      <pubDate>Mon, 10 Apr 2017 05:10:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072810#M24568</guid>
      <dc:creator>Jonghak_K_Intel</dc:creator>
      <dc:date>2017-04-10T05:10:48Z</dc:date>
    </item>
    <item>
      <title>HI Dimitry,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072811#M24569</link>
      <description>&lt;P&gt;HI Dimitry,&lt;/P&gt;

&lt;P&gt;A new IPP resize automatically defines a pixel step using input ROIs. To define a pixel step externally you can use WarpAffine functions.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;BR /&gt;
	Valentin&lt;/P&gt;</description>
      <pubDate>Mon, 10 Apr 2017 09:46:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiResizeLinear-missing-factorx-factory/m-p/1072811#M24569</guid>
      <dc:creator>Valentin_K_Intel</dc:creator>
      <dc:date>2017-04-10T09:46:08Z</dc:date>
    </item>
  </channel>
</rss>

