<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Hi Ying in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108581#M25370</link>
    <description>&lt;P&gt;Hi Ying&lt;/P&gt;

&lt;P&gt;Thanks for the prompt answer!&lt;/P&gt;

&lt;P&gt;I am dealing with medical data (hundreds of slices of 512*512 signed shorts usually, but also much bigger), and I would like to cut a slab or plane of this data, in general direction, with interpolation.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Copying the data to 32f is impossible due to the cost in memory usage and time consumption.&lt;/P&gt;

&lt;P&gt;Best&lt;/P&gt;

&lt;P&gt;Hadar&lt;/P&gt;</description>
    <pubDate>Fri, 29 Jan 2016 07:43:59 GMT</pubDate>
    <dc:creator>Hadar_P_</dc:creator>
    <dc:date>2016-01-29T07:43:59Z</dc:date>
    <item>
      <title>ipprWarpAffine</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108579#M25368</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;Is there a special reason why ipprWarpAffine (and the other 3d functions as well)&amp;nbsp;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;does not support signed short data? Is there a way to bypass it?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Thanks&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Hadar&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2016 07:16:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108579#M25368</guid>
      <dc:creator>Hadar_P_</dc:creator>
      <dc:date>2016-01-29T07:16:13Z</dc:date>
    </item>
    <item>
      <title>Hi Hadar, </title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108580#M25369</link>
      <description>&lt;P&gt;Hi Hadar,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Right, it had only 8u, 16u, 32f in current version because they were asked when implemented. &amp;nbsp;If your data are 16s, you may have to convert to 32f &amp;nbsp;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;ippsConvert_16s32f, then call 32f function.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;Do you like the 16s as a new feature? &amp;nbsp;if yes, &lt;/SPAN&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;could you please share some background information about your project, data size etc. If they are private Information, you can send us private message. &lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;Ying &amp;nbsp;H.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;Intel IPP Support&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;P.S&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;IppStatus ipprWarpAffine_8u_C1V(const Ipp8u* &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;pSrc&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, IpprVolume &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;srcVolume&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;srcStep&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;srcPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;srcVoi&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, Ipp8u* &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;pDst&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;dstStep&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;dstPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;dstVOI&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, const double &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;coeffs[3][4]&lt;/SPAN&gt;&lt;SPAN class="kwd" style="font-size: 1em; line-height: 1.5;"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var" style="font-size: 1em; line-height: 1.5;"&gt;interpolation&lt;/SPAN&gt;&lt;SPAN class="delim" style="font-size: 1em; line-height: 1.5;"&gt;);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P class="dlsyntaxpara"&gt;&lt;SPAN class="kwd"&gt;IppStatus ipprWarpAffine_16u_C1V(const Ipp16u* &lt;/SPAN&gt;&lt;SPAN class="var"&gt;pSrc&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprVolume &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcVolume&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcVoi&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, Ipp16u* &lt;/SPAN&gt;&lt;SPAN class="var"&gt;pDst&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstVOI&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, const double &lt;/SPAN&gt;&lt;SPAN class="var"&gt;coeffs[3][4]&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;interpolation&lt;/SPAN&gt;&lt;SPAN class="delim"&gt;);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P class="dlsyntaxpara"&gt;&lt;SPAN class="kwd"&gt;IppStatus ipprWarpAffine_32f_C1V(const Ipp32f* &lt;/SPAN&gt;&lt;SPAN class="var"&gt;pSrc&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprVolume &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcVolume&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var"&gt;srcVoi&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, Ipp32f* &lt;/SPAN&gt;&lt;SPAN class="var"&gt;pDst&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstPlaneStep&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, IpprCuboid &lt;/SPAN&gt;&lt;SPAN class="var"&gt;dstVOI&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, const double &lt;/SPAN&gt;&lt;SPAN class="var"&gt;coeffs[3][4]&lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;, int &lt;/SPAN&gt;&lt;SPAN class="var"&gt;interpolation&lt;/SPAN&gt;&lt;SPAN class="delim"&gt;);&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2016 07:37:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108580#M25369</guid>
      <dc:creator>Ying_H_Intel</dc:creator>
      <dc:date>2016-01-29T07:37:58Z</dc:date>
    </item>
    <item>
      <title>Hi Ying</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108581#M25370</link>
      <description>&lt;P&gt;Hi Ying&lt;/P&gt;

&lt;P&gt;Thanks for the prompt answer!&lt;/P&gt;

&lt;P&gt;I am dealing with medical data (hundreds of slices of 512*512 signed shorts usually, but also much bigger), and I would like to cut a slab or plane of this data, in general direction, with interpolation.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Copying the data to 32f is impossible due to the cost in memory usage and time consumption.&lt;/P&gt;

&lt;P&gt;Best&lt;/P&gt;

&lt;P&gt;Hadar&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2016 07:43:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108581#M25370</guid>
      <dc:creator>Hadar_P_</dc:creator>
      <dc:date>2016-01-29T07:43:59Z</dc:date>
    </item>
    <item>
      <title>To make it clear, I would</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108582#M25371</link>
      <description>&lt;P&gt;To make it clear, I would like to have something like matlab's interp3&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2016 07:49:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108582#M25371</guid>
      <dc:creator>Hadar_P_</dc:creator>
      <dc:date>2016-01-29T07:49:14Z</dc:date>
    </item>
    <item>
      <title>Hi Hadar,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108583#M25372</link>
      <description>&lt;P&gt;Hi Hadar,&lt;/P&gt;

&lt;P&gt;Get it. matlab's interp3, I had escalated your request to IPP product definition team for considering in next product plan. I will let you know if any updates about the feature.&amp;nbsp;DPD200579391&lt;/P&gt;

&lt;P&gt;Best Regards,&lt;/P&gt;

&lt;P&gt;Ying&lt;/P&gt;</description>
      <pubDate>Tue, 02 Feb 2016 02:00:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108583#M25372</guid>
      <dc:creator>Ying_H_Intel</dc:creator>
      <dc:date>2016-02-02T02:00:48Z</dc:date>
    </item>
    <item>
      <title>Ying</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108584#M25373</link>
      <description>&lt;P&gt;Ying&lt;/P&gt;

&lt;P&gt;Thanks a lot for your response, please add to the request the possibility to have different (float) factors for each axis, like different millimeter per pixel in each direction&lt;/P&gt;

&lt;P&gt;Thanks again and best regards&lt;/P&gt;

&lt;P&gt;Hadar&lt;/P&gt;</description>
      <pubDate>Tue, 02 Feb 2016 07:49:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ipprWarpAffine/m-p/1108584#M25373</guid>
      <dc:creator>Hadar_P_</dc:creator>
      <dc:date>2016-02-02T07:49:45Z</dc:date>
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  </channel>
</rss>

