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    <title>topic Hi Igor and Gennady F., in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136252#M25969</link>
    <description>&lt;P&gt;Hi Igor and Gennady F.,&lt;/P&gt;&lt;P&gt;Thank you for your answers. We will consider our options and get back to you if it is relevant.&lt;/P&gt;&lt;P&gt;//Bo&lt;/P&gt;</description>
    <pubDate>Wed, 30 Jan 2019 11:43:31 GMT</pubDate>
    <dc:creator>Holm-Rasmussen__Bo</dc:creator>
    <dc:date>2019-01-30T11:43:31Z</dc:date>
    <item>
      <title>ippsFIRSRGetSize results in extremely large bufSize</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136246#M25963</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Using IPPS version 2018 update 3 and 2019 update 1, both with the same result for the following call.&lt;/P&gt;
&lt;PRE class="brush:cpp; class-name:dark;"&gt;ippsFIRSRGetSize (TAPS_LEN,  ipp32f ,  &amp;amp;specSize,  &amp;amp;bufSize );&lt;/PRE&gt;

&lt;P&gt;No matter what size TAPS_LEN the&amp;nbsp;bufSize is &amp;gt;32k. This is an extremely large buffer for e.g. a 4&amp;nbsp;tap FIR filter. Both specSize and bufSize is of type int as documentation says. The general purpose IIR filter of the same order takes up much less memory.&lt;/P&gt;
&lt;P&gt;Is this an error in IPPS? Or what could the reason be?&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jan 2019 14:08:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136246#M25963</guid>
      <dc:creator>Holm-Rasmussen__Bo</dc:creator>
      <dc:date>2019-01-18T14:08:59Z</dc:date>
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      <title>Hi Bo.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136247#M25964</link>
      <description>&lt;P&gt;Hi Bo.&lt;/P&gt;&lt;P&gt;Many customers of IPP needs&amp;nbsp;so named in-place mode of functions(pDst=pSrc) when source and destination vector is the same by some reasons. To process properly this situation&amp;nbsp;and store temporal data FIRSR needs about&amp;nbsp;~32K(L1 size) in reserved buffer.&amp;nbsp;The API of&amp;nbsp;ippsFIRSRGetSize does not have information about re-place or in-place mode and requests maximum buffer size.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 19 Jan 2019 19:31:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136247#M25964</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2019-01-19T19:31:11Z</dc:date>
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    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136248#M25965</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;&lt;P&gt;Is there a work around for this. We are not using inline processing. Bu we are working with a hard limit of &amp;lt; 32K for mallocs. The reason is that we are working in an MS APO context, so we MUST use AERT_Allocate to allocate memory - which is limited to 32K. In addition a few bytes are wasted due to Ipp's memory alignment requirements.&lt;/P&gt;&lt;P&gt;&lt;A href="https://docs.microsoft.com/en-us/windows/desktop/api/baseaudioprocessingobject/nf-baseaudioprocessingobject-aert_allocate" target="_blank"&gt;https://docs.microsoft.com/en-us/windows/desktop/api/baseaudioprocessingobject/nf-baseaudioprocessingobject-aert_allocate&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Troels Blum&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Jan 2019 09:03:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136248#M25965</guid>
      <dc:creator>Blum__Troels</dc:creator>
      <dc:date>2019-01-23T09:03:06Z</dc:date>
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    <item>
      <title>Hi Andrey, thank you for your</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136249#M25966</link>
      <description>&lt;P&gt;Hi Andrey, thank you for your answer.&lt;/P&gt;&lt;P&gt;Just to inform you, Troels Blum is my colleague and I join his question.&lt;/P&gt;&lt;P&gt;//Bo&lt;/P&gt;</description>
      <pubDate>Mon, 28 Jan 2019 08:28:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136249#M25966</guid>
      <dc:creator>Holm-Rasmussen__Bo</dc:creator>
      <dc:date>2019-01-28T08:28:26Z</dc:date>
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      <title>Hi Bo and Troels,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136250#M25967</link>
      <description>&lt;P&gt;Hi Bo and Troels,&lt;/P&gt;&lt;P&gt;How many taps do you use?&lt;/P&gt;&lt;P&gt;ippsFIR internaly, in addition to "inplace" mode support, has at least 3 different algorithm implementations: for rather small filter orders (criterion also depends on cpu arch) ~&amp;lt;32 it uses so called "vertical" unrolling, for ~32- ~64 - so called "horizontal" unrolling, and, then,&amp;nbsp;for higher filter orders - FFT (convolution theorem) based algorithm. I guess it's clear that the last one also requires&amp;nbsp;more memory for internal buffers than the first two.&lt;/P&gt;&lt;P&gt;regards, Igor&lt;/P&gt;</description>
      <pubDate>Mon, 28 Jan 2019 08:44:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136250#M25967</guid>
      <dc:creator>Igor_A_Intel</dc:creator>
      <dc:date>2019-01-28T08:44:33Z</dc:date>
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    <item>
      <title>Hello  Bo and Troels,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136251#M25968</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&amp;nbsp;Bo and Troels,&lt;/P&gt;&lt;P&gt;in the case if you are really interesting into this feature implementation, Could you submit this feature request to the &lt;A href="https://supporttickets.intel.com/servicecenter"&gt;Intel online service center?&amp;nbsp;&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 30 Jan 2019 10:09:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136251#M25968</guid>
      <dc:creator>Gennady_F_Intel</dc:creator>
      <dc:date>2019-01-30T10:09:00Z</dc:date>
    </item>
    <item>
      <title>Hi Igor and Gennady F.,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136252#M25969</link>
      <description>&lt;P&gt;Hi Igor and Gennady F.,&lt;/P&gt;&lt;P&gt;Thank you for your answers. We will consider our options and get back to you if it is relevant.&lt;/P&gt;&lt;P&gt;//Bo&lt;/P&gt;</description>
      <pubDate>Wed, 30 Jan 2019 11:43:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippsFIRSRGetSize-results-in-extremely-large-bufSize/m-p/1136252#M25969</guid>
      <dc:creator>Holm-Rasmussen__Bo</dc:creator>
      <dc:date>2019-01-30T11:43:31Z</dc:date>
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