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    <title>topic ippiMalloc_8u_C1 returning wrong dstStep? in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-8u-C1-returning-wrong-dstStep/m-p/1142675#M26139</link>
    <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Im using -&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;B style="font-size: 1em;"&gt;ippCore 2019.0.0 Gold (r59881)&lt;/B&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;On a mac&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;IppiSize dstSize = { 480, 270 };&lt;/P&gt;

&lt;P&gt;Ipp8u* pDst = ippiMalloc_8u_C1(dstSize.width, dstSize.height, &amp;amp;dstStep);&lt;/P&gt;

&lt;P&gt;ippiMalloc_8u_C1&amp;nbsp;returns&amp;nbsp;dstStep=512 resulting in a 32 pixel black border on the right side of the picture.&lt;/P&gt;

&lt;P&gt;However 480 is integer dividable by 32 (if that is a requirement to be 32 bytes aligned in the line by line stepping) and forcing dstStep to 480 works for all following processes I use and the black border is gone.&lt;/P&gt;

&lt;P&gt;I use the example code -&amp;gt;&lt;/P&gt;

&lt;P&gt;&lt;A href="https://software.intel.com/en-us/ipp-dev-reference-resizeantialiasing-sample"&gt;https://software.intel.com/en-us/ipp-dev-reference-resizeantialiasing-sample&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;Am I doing something wrong or is it a bug?&lt;/P&gt;

&lt;P&gt;Thanks for helping.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;/Anders&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 11 Oct 2018 16:35:35 GMT</pubDate>
    <dc:creator>cedronius__anders</dc:creator>
    <dc:date>2018-10-11T16:35:35Z</dc:date>
    <item>
      <title>ippiMalloc_8u_C1 returning wrong dstStep?</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-8u-C1-returning-wrong-dstStep/m-p/1142675#M26139</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Im using -&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;B style="font-size: 1em;"&gt;ippCore 2019.0.0 Gold (r59881)&lt;/B&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;On a mac&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;IppiSize dstSize = { 480, 270 };&lt;/P&gt;

&lt;P&gt;Ipp8u* pDst = ippiMalloc_8u_C1(dstSize.width, dstSize.height, &amp;amp;dstStep);&lt;/P&gt;

&lt;P&gt;ippiMalloc_8u_C1&amp;nbsp;returns&amp;nbsp;dstStep=512 resulting in a 32 pixel black border on the right side of the picture.&lt;/P&gt;

&lt;P&gt;However 480 is integer dividable by 32 (if that is a requirement to be 32 bytes aligned in the line by line stepping) and forcing dstStep to 480 works for all following processes I use and the black border is gone.&lt;/P&gt;

&lt;P&gt;I use the example code -&amp;gt;&lt;/P&gt;

&lt;P&gt;&lt;A href="https://software.intel.com/en-us/ipp-dev-reference-resizeantialiasing-sample"&gt;https://software.intel.com/en-us/ipp-dev-reference-resizeantialiasing-sample&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;Am I doing something wrong or is it a bug?&lt;/P&gt;

&lt;P&gt;Thanks for helping.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;/Anders&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Oct 2018 16:35:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-8u-C1-returning-wrong-dstStep/m-p/1142675#M26139</guid>
      <dc:creator>cedronius__anders</dc:creator>
      <dc:date>2018-10-11T16:35:35Z</dc:date>
    </item>
    <item>
      <title>Hi Anders.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-8u-C1-returning-wrong-dstStep/m-p/1142676#M26140</link>
      <description>&lt;P&gt;Hi Anders.&lt;/P&gt;

&lt;P&gt;IPP functions process images line by line using special SIMD instructions. Unfortunately these instructions have performance penalty when they load block of bytes that cross cache line.&amp;nbsp; Cache line is 64 byte length. So to try t&lt;SPAN style="font-size: 1em;"&gt;o achieve the better performance it is preferable to align lines of image on 64 byte. Also you can allocate memory using ippsMalloc_8u(&lt;/SPAN&gt;&lt;SPAN style="font-size: 12px;"&gt;dstSize.width*dstSize.height&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;).&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Thanks for your feedback.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Oct 2018 23:46:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/ippiMalloc-8u-C1-returning-wrong-dstStep/m-p/1142676#M26140</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-10-11T23:46:01Z</dc:date>
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