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    <title>topic These are my test results for in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161342#M26605</link>
    <description>&lt;P&gt;These are my test results for Ipp32f (float) / Ipp32fc (complex) multi-rate FIR filtering attached. The test compares the for Ipp32f (float) / Ipp32fc (complex) filters output with C versions and reports the error if the outputs are different.&amp;nbsp; As you can see I have a lot of&amp;nbsp;failed cases in both tests. I am very sure in my C codes. I suspect Ipp library is wrong. Please help me to fine my problems.&lt;/P&gt;

&lt;P&gt;Regards,&lt;/P&gt;

&lt;P&gt;Vlad&lt;/P&gt;</description>
    <pubDate>Mon, 25 Jun 2018 16:12:50 GMT</pubDate>
    <dc:creator>Ionen__Vlad</dc:creator>
    <dc:date>2018-06-25T16:12:50Z</dc:date>
    <item>
      <title>Ipp multi-rate FIR filtering ippsFIRMR_32f, ippsFIRMR_32fc problem</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161334#M26597</link>
      <description>&lt;P&gt;Hi there,&lt;/P&gt;

&lt;P&gt;I am using ippCore 2018.0.1 (r56998) and having some problem with&amp;nbsp;Ipp32f (float) / Ipp32fc (complex) multi-rate FIR filtering. I tested the filter for upFactor = 1, downFactor = 1, number of filter coefficients tapsLen = 4 - 40,&amp;nbsp; the filter coefficients are the same - all ones / random,&amp;nbsp; the source vector is all ones / random and got the following results:&lt;/P&gt;

&lt;P&gt;The filter coefficients are all ones and&amp;nbsp; the source vector is all ones work fine except first tapsLen-1 samples in the output buffer were corrupted for tapsLen = 5, 7, 9 for float data and tapsLen = 5, 6, 8 for complex data.&lt;/P&gt;

&lt;P&gt;The filter coefficients are all ones and&amp;nbsp; the source vector is random work fine except first tapsLen-1 samples in the output buffer were corrupted for tapsLen = 5, 8, 10, 12, 14, 16, 18, 20, 22 and more for float data and tapsLen = 5, 6, 8 for complex data.&lt;/P&gt;

&lt;P&gt;The filter coefficients are random and the source vector is random produced unexpected output.&lt;/P&gt;

&lt;P&gt;My IDE Environment:&lt;/P&gt;

&lt;P&gt;Win 7 Pro x64, Intel Core i7-6700 @ 3.40GHz, Ram 8.0 GB&lt;BR /&gt;
	C:\Program Files (x86)\IntelSWTools\compilers_and_libraries_2018.1.156\windows\ipp\include\&lt;BR /&gt;
	C:\Program Files (x86)\IntelSWTools\compilers_and_libraries_2018.1.156\windows\ipp\lib\ia32_win\&lt;BR /&gt;
	C:\Program Files (x86)\IntelSWTools\compilers_and_libraries_2018.1.156\windows\compiler\lib\ia32_win\&lt;BR /&gt;
	C:\Program Files (x86)\IntelSWTools\compilers_and_libraries_2018.1.156\windows\redist\ia32_win\ipp\&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 16 Mar 2018 15:07:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161334#M26597</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-03-16T15:07:39Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161335#M26598</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;Could you provide small reproducer how you call ippsFIRMR ?&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks for using IPP.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Mar 2018 13:18:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161335#M26598</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-03-19T13:18:10Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161336#M26599</link>
      <description>&lt;DIV class="field field-name-comment-body field-type-text-long field-label-hidden"&gt;
	&lt;DIV class="field-items"&gt;
		&lt;DIV class="field-item even"&gt;
			&lt;P&gt;Hi Andrey,&lt;/P&gt;

			&lt;P&gt;This is my test project for verifying/profiling IPP multi-rate FIR filter in ZIP: Test_RatRateFloat Win attached.&lt;/P&gt;

			&lt;P&gt;This is MSVS C++ Community 2017 project. Use Debug version only. The bTest_nRatRateCplx function calls C multi-rate FIR nRatRateFl and IPP nRatRateFlIntel filters and compares outputs for differences.&lt;BR /&gt;
				You can dump data into the file to compare.&lt;BR /&gt;
				You can also control the following:&lt;/P&gt;

			&lt;P&gt;#define MIN_TAPS&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 4&lt;BR /&gt;
				#define MAX_TAPS&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 60&lt;BR /&gt;
				#define MAX_INTERP&amp;nbsp;&amp;nbsp;&amp;nbsp; 10&lt;BR /&gt;
				#define MAX_DECIM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 10&lt;BR /&gt;
				#define INPUT_VEC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ONES //RAND //ONES&amp;nbsp; RAMP&lt;BR /&gt;
				#define COEFF_VEC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ONES //RAND //ONES&amp;nbsp; RAMP&lt;/P&gt;

			&lt;P&gt;Regards,&lt;BR /&gt;
				Vlad&lt;/P&gt;
		&lt;/DIV&gt;
	&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Mon, 19 Mar 2018 19:09:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161336#M26599</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-03-19T19:09:56Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161337#M26600</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;Thanks for your reproducer.&amp;nbsp;&lt;SPAN style="font-size: 1em;"&gt;I've tried to run it. It works. The garbage in beginning of output vector is non normal. According with documentation&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;EM style="font-size: 1em;"&gt;&lt;A href="https://software.intel.com/en-us/ipp-dev-reference-firmr"&gt;https://software.intel.com/en-us/ipp-dev-reference-firmr&lt;/A&gt;&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;&lt;EM style="font-size: 1em;"&gt;"pDlyDst - Pointer to the array containing values for the destination delay line. The value can be NULL. If not NULL, the array length is defined as (tapsLen+upFactor-1)/upFactor."&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;ippsFIRMR_32f requires tapsLen elements in delay line pDlySrc if up==down==1. (not tapsLen-1 as in ippsFIRSR). It is necessary for some combinations of upFactor, downFactor and Phases. Try please to copy 1 additional element to delay line pDlySrc.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks.&lt;BR /&gt;
	&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 21 Mar 2018 14:23:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161337#M26600</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-03-21T14:23:11Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161338#M26601</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;Tried to copy 1 additional element to delay line pDlySrc. Yes, It fixed the garbage in beginning of output vector when the filter coefficients are all ones and&amp;nbsp; the source vector is all ones.&lt;/P&gt;

&lt;P&gt;But with filter coefficients are random and the source vector is random still got unexpected output.&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Wed, 21 Mar 2018 15:15:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161338#M26601</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-03-21T15:15:53Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161339#M26602</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;try do add 2 next modifications in your code f&lt;SPAN style="font-size: 1em;"&gt;or RAND and coeff_len=4 according with&amp;nbsp; IPP manual.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;1. pDlySrc expects coeff_len elements from previous block, so first call is&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;S&gt;&lt;SPAN style="font-size: 13.008px;"&gt;memcpy(pDlySrc, psFilter-&amp;gt;pcfState, sizeof(float) * psFilter-&amp;gt;nStates);&lt;/SPAN&gt;&lt;/S&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px;"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;memcpy(pDlySrc+1, psFilter-&amp;gt;pcfState, sizeof(float) * psFilter-&amp;gt;nStates);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px;"&gt;2. Filter coefficients should be inverted.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;S&gt;&lt;SPAN style="font-size: 13.008px;"&gt;sStatus = ippsFIRMRInit_32f((Ipp32f*)afCoeffIntel, psFilter-&amp;gt;nTaps, psFilter-&amp;gt;nInterp, upPhase, psFilter-&amp;gt;nDecim, downPhase, pSpec);&lt;/SPAN&gt;&lt;/S&gt;&lt;/P&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;Ipp32f afCoeffIntel_inv[4] = { afCoeffIntel[3], afCoeffIntel[2], afCoeffIntel[1], afCoeffIntel[0] };&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;sStatus = ippsFIRMRInit_32f((Ipp32f*)afCoeffIntel_inv, psFilter-&amp;gt;nTaps, psFilter-&amp;gt;nInterp, upPhase, psFilter-&amp;gt;nDecim, downPhase, pSpec);&lt;/SPAN&gt;&lt;/DIV&gt;

&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;I've added these 2 modifications. It produces correct result for RAND and coeff_len=4.&amp;nbsp; I hope these fixes will help you to modify your application for other cases too.&lt;/SPAN&gt;&lt;/DIV&gt;

&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;Thanks.&lt;/SPAN&gt;&lt;/DIV&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 23 Mar 2018 13:29:03 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161339#M26602</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-03-23T13:29:03Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161340#M26603</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;I tried yours update with RAND filter coefficients and source vector and got much better results. The test ran fine and started failing for interp=1, decim=6 and more, taps=4 and more. The test failed for the first 1 - 5 samples.&lt;/P&gt;

&lt;P&gt;The test also failed a lot when interp is more than 1.&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Fri, 23 Mar 2018 14:42:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161340#M26603</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-03-23T14:42:01Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161341#M26604</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;I got Intel update 3 for my IDE Environment, but still have problem with Ipp32f (float) / Ipp32fc (complex) multi-rate FIR filtering. I have problem with RAND filter coefficients and source vector for interpolation=1, decimation=6 and more, taps=4 and more. The test fails for the first 1 - 5 samples. The test also fails a lot when interpolation is more than 1.&lt;BR /&gt;
	Do you have problem in your test with RAND filter coefficients and source vector for interpolation=1-10, decimation=1-10, taps=4-60?&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 19 Jun 2018 19:40:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161341#M26604</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-06-19T19:40:53Z</dc:date>
    </item>
    <item>
      <title>These are my test results for</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161342#M26605</link>
      <description>&lt;P&gt;These are my test results for Ipp32f (float) / Ipp32fc (complex) multi-rate FIR filtering attached. The test compares the for Ipp32f (float) / Ipp32fc (complex) filters output with C versions and reports the error if the outputs are different.&amp;nbsp; As you can see I have a lot of&amp;nbsp;failed cases in both tests. I am very sure in my C codes. I suspect Ipp library is wrong. Please help me to fine my problems.&lt;/P&gt;

&lt;P&gt;Regards,&lt;/P&gt;

&lt;P&gt;Vlad&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jun 2018 16:12:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161342#M26605</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-06-25T16:12:50Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161343#M26606</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;I've tried to debug you app.&amp;nbsp;I think it is necessary to replace&amp;nbsp;sizeof(complex)&amp;nbsp;with sizeof(float) to prevent overwrite:&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;// The Intel filter state is not at the start of the pfIn data

   memcpy(afInIntel, afIn + sFilterIntel.nStates, (nIn+nTaps) * sizeof(complex));&lt;/PRE&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; font-family: Consolas, &amp;quot;Lucida Console&amp;quot;, Menlo, Monaco, &amp;quot;DejaVu Sans Mono&amp;quot;, monospace, sans-serif;"&gt;&amp;nbsp;&lt;/SPAN&gt;Also check please that you invert taps in cycle (not static array as in previous my message).&lt;SPAN style="font-size: 1em; font-family: Consolas, &amp;quot;Lucida Console&amp;quot;, Menlo, Monaco, &amp;quot;DejaVu Sans Mono&amp;quot;, monospace, sans-serif;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;#if 0
    sStatus = ippsFIRMRInit_32f((Ipp32f*)afCoeffIntel, psFilter-&amp;gt;nTaps, psFilter-&amp;gt;nInterp, upPhase, psFilter-&amp;gt;nDecim, downPhase, pSpec);
#else
    Ipp32f* afCoeffIntel_inv=ippsMalloc_32f(psFilter-&amp;gt;nTaps);
    int nn;
    for (nn = 0; nn &amp;lt; psFilter-&amp;gt;nTaps; nn++) {
        afCoeffIntel_inv[nn] = afCoeffIntel[psFilter-&amp;gt;nTaps - 1 - nn];
    }
    sStatus = ippsFIRMRInit_32f((Ipp32f*)afCoeffIntel_inv, psFilter-&amp;gt;nTaps, psFilter-&amp;gt;nInterp, upPhase, psFilter-&amp;gt;nDecim, downPhase, pSpec);
    ippsFree(afCoeffIntel_inv);
#endif&lt;/PRE&gt;

&lt;DIV&gt;&lt;SPAN style="font-size: 13.008px;"&gt;Send me please your final C file to sync our versions in case of wrong results again.&lt;/SPAN&gt;&lt;/DIV&gt;

&lt;PRE class="brush:cpp;"&gt;&lt;SPAN style="font-size: 1em;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/PRE&gt;

&lt;DIV&gt;
	&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;

	&lt;P&gt;Thanks.&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Sat, 30 Jun 2018 21:50:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161343#M26606</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-06-30T21:50:46Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161344#M26607</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;I think I fixed all bug you found in my C code. Thanks a lot for help and cooperation.&lt;BR /&gt;
	But I still have problem in test with RAND filter coefficients and source vector for interpolation=1-10, decimation=1-10, taps=4-60.&lt;BR /&gt;
	I attached my latest test project and test result.&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Tue, 03 Jul 2018 15:42:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161344#M26607</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-07-03T15:42:25Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161345#M26608</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;Please set the Intel filter state in the test as:&lt;BR /&gt;
	#define FILT_ST_INTEL(taps,interp)&amp;nbsp;&amp;nbsp; &amp;nbsp;((taps+interp-1) / (interp)).&lt;/P&gt;

&lt;P&gt;Also ignore my last test result because it was done for Intel filter state as&lt;BR /&gt;
	#define FILT_ST_INTEL(taps,interp)&amp;nbsp;&amp;nbsp; &amp;nbsp;((taps - 1) / (interp))&lt;/P&gt;

&lt;P&gt;The result is better with this fix, but still have errors.&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Tue, 03 Jul 2018 15:57:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161345#M26608</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-07-03T15:57:27Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161346#M26609</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;I'm attaching file with new function&amp;nbsp;&lt;SPAN style="font-size: 13.008px;"&gt;nRatRateFl_ref that calculates firmr. The result if this function&amp;nbsp; is&amp;nbsp; the same with ippsFIRMR_32f. This function demonstrates what upFactor and downFactor is in terms of IPP. All tests are passed now. I hope this function&amp;nbsp; will help you to use ippsFIRMR properly .&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px;"&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jul 2018 12:13:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161346#M26609</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-07-09T12:13:13Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161347#M26610</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;The new function&amp;nbsp;nRatRateFl_ref works fine. Do you have C version of Ipp32fc (complex) ippsFIRMR?&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jul 2018 14:13:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161347#M26610</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-07-09T14:13:23Z</dc:date>
    </item>
    <item>
      <title>No I don't. But it is easy to</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161348#M26611</link>
      <description>&lt;P&gt;No I don't. But it is easy to modify C code of 32f FIRMR to 32fc FIRMR just replacing of all operations from real to complex.&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jul 2018 14:35:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161348#M26611</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-07-09T14:35:26Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161349#M26612</link>
      <description>&lt;P&gt;Hi Andrey,&lt;BR /&gt;
	I got two problems with new function nRatRateFl_ref when ran test with RAND filter coefficients and source vector using MAX_TRIALS&amp;nbsp;&amp;nbsp; &amp;nbsp;10:&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1.&amp;nbsp;&amp;nbsp; &amp;nbsp;The test start failing a lot after interp=5, decim=8, taps=36 and trial =9;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2.&amp;nbsp;&amp;nbsp; &amp;nbsp;The test got crashed because of ippsMalloc_32f function did not allocate upBuf for in=100, interp=5, decim=8, taps=44 and set the pointer to 0 in vFilterCore_ref function.&lt;BR /&gt;
	Can you try MAX_TRIALS&amp;nbsp;&amp;nbsp; &amp;nbsp;10 in your setup.&lt;BR /&gt;
	Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Tue, 10 Jul 2018 15:32:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161349#M26612</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-07-10T15:32:41Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161350#M26613</link>
      <description>&lt;P&gt;Hi Vlad.&lt;/P&gt;

&lt;P&gt;Could you please modify&amp;nbsp;&lt;SPAN style="font-size: 12px;"&gt;vFilterCore_ref function according with your application? This function is very simple for debugging. When all test pass we replace it with actual ippsFIRMR function.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12px;"&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 30 Jul 2018 21:31:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161350#M26613</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-07-30T21:31:46Z</dc:date>
    </item>
    <item>
      <title>Hi Andrey,</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161351#M26614</link>
      <description>&lt;P&gt;Hi Andrey,&lt;/P&gt;

&lt;P&gt;Our company is widely using nRatRateFl for float and nRatRateCpx for complex C functions for multi-rate FIR filtering for a long time and they are correct. I used these functions as references for Ipp32f (float) / Ipp32fc (complex) functions test at the beginning. I am surprised you suggest different C version of multi-rate FIR filter for test. &amp;nbsp;I think Ipp32f (float) / Ipp32fc (complex) functions should work as ours FIR filters that I used at the beginning.&lt;/P&gt;

&lt;P&gt;Regards,&lt;BR /&gt;
	Vlad&lt;/P&gt;</description>
      <pubDate>Tue, 31 Jul 2018 14:20:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161351#M26614</guid>
      <dc:creator>Ionen__Vlad</dc:creator>
      <dc:date>2018-07-31T14:20:54Z</dc:date>
    </item>
    <item>
      <title>Hi Vlad.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161352#M26615</link>
      <description>Hi Vlad.
ippsFIRMR function uses FIR API aligned with Matlab system. The chapter "description" by link &lt;A href="https://se.mathworks.com/help/dsp/ref/firrateconversion.html" target="_blank"&gt;https://se.mathworks.com/help/dsp/ref/firrateconversion.html&lt;/A&gt; items 1, 2, 3 explain FIR MR pipeline. "Sample Offset, D" by link &lt;A href="https://se.mathworks.com/help/dsp/ref/downsample.html" target="_blank"&gt;https://se.mathworks.com/help/dsp/ref/downsample.html&lt;/A&gt; is analog of IPP downPhase. upPhase  is position of non-zero element during upsampling. Attached C version is not IPP production code. It is just very simple reference code that demonstrates ippsFIRMR API as easy as possible for debug.
Thanks.</description>
      <pubDate>Fri, 24 Aug 2018 15:36:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Ipp-multi-rate-FIR-filtering-ippsFIRMR-32f-ippsFIRMR-32fc/m-p/1161352#M26615</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-08-24T15:36:11Z</dc:date>
    </item>
  </channel>
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