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    <title>topic Hi in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177232#M27077</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;Quick analysis shows the function shall be optimized. We will investigate this more deeply and return back with an answer about 2 weeks late.&lt;/P&gt;

&lt;P&gt;Pavel&lt;/P&gt;</description>
    <pubDate>Fri, 21 Sep 2018 05:43:51 GMT</pubDate>
    <dc:creator>Pavel_B_Intel1</dc:creator>
    <dc:date>2018-09-21T05:43:51Z</dc:date>
    <item>
      <title>Bug report: ippiLUTPalette_8u_C1R</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177230#M27075</link>
      <description>&lt;P&gt;Hi, I have noticed a bug in ippiLUTPalette_8u_C1R function during my odd dimension image tests. I am using windows 64bit ipp v2018.3.210.&lt;/P&gt;

&lt;P&gt;I have (w, h) = (1575, 1049), srcStep = 1664, dstStep = 1576, s_lut[256] is a uint8_t array defined in global scope.&lt;/P&gt;

&lt;P&gt;Now calling&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;ippiLUTPalette_8u_C1R(srcData, srcStep, dstData, dstStep, IppiSize{w, h}, s_lut, 8);&lt;/PRE&gt;

&lt;P&gt;results in wrong values except the first line of the image. It seems srcStep is larger than what this function can handle. On a side note, IppiCopy_8u_C1R works without any problem for the same data.&lt;/P&gt;

&lt;P&gt;After I noticed that only the first row of the destination image is correct, I applied a simple workaround. Calling&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;for(int j = 0; j &amp;lt; h; j++)
    ippiLUTPalette_8u_C1R(srcData + j*srcStep, w, dstData + j*dstStep, w, IppiSize{w, 1}, s_lut, 8);&lt;/PRE&gt;

&lt;P&gt;works without any problems and resulting values are as expected. Here I process row by row giving width as the step. I think step value is the problem.&lt;/P&gt;

&lt;P&gt;On another note, I have checked the correctness of this function against simple C implementation as below&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;uint8_t *srcRow = srcData;
uint8_t *dstRow = dstData;

for(int j = 0; j &amp;lt; h; j++)
{
    for(int i = 0; i &amp;lt; w; i++)
    {
        dstRow&lt;I&gt; = s_lut[ srcRow&lt;I&gt; ];
    }
                        
    srcRow += srcStep;
    dstRow += dstStep;
}
&lt;/I&gt;&lt;/I&gt;&lt;/PRE&gt;

&lt;P&gt;Runtimes on Intel i7-8700K:&lt;/P&gt;

&lt;P&gt;ippiLUTPalette_8u_C1R -&amp;gt; 980 us&lt;/P&gt;

&lt;P&gt;Simple C loop byte-by-byte lookup -&amp;gt; 1070 us&lt;/P&gt;

&lt;P&gt;Is this function really not optimized? or very unlikely but there are still some invalid operations even when applied row-by-row, so that it is becoming this slow? 1ms for going over the image only once is really too much. ippiCopy_8u_C1R on the exact same data takes 88 us (&amp;gt;11x faster).&lt;/P&gt;</description>
      <pubDate>Wed, 29 Aug 2018 11:37:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177230#M27075</guid>
      <dc:creator>Alparslan_Y_</dc:creator>
      <dc:date>2018-08-29T11:37:58Z</dc:date>
    </item>
    <item>
      <title>Hi , </title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177231#M27076</link>
      <description>&lt;P&gt;Hi ,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;have you tried to get status from the function?&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Would you try this and see what it says. ?&lt;/P&gt;

&lt;PRE style="box-sizing: border-box; margin-top: 0px; margin-bottom: 1.06667em; font-family: &amp;quot;Courier New&amp;quot;, Courier, monospace; font-size: 15px; line-height: 2.13333em; white-space: pre-wrap; background-color: rgb(245, 245, 245); padding: 10px; clear: both; word-wrap: break-word; color: rgb(85, 85, 85);"&gt; status = ippiLUTPalette_8u32u_C1R( pSrc, srcStep, pDst, dstStep, roiSize, pTable, nBitSize);&lt;/PRE&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;and please refer this example page for the usage.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px;"&gt;&lt;A href="https://software.intel.com/en-us/ipp-dev-reference-lutpalette-lutpaletteswap" target="_blank"&gt;https://software.intel.com/en-us/ipp-dev-reference-lutpalette-lutpaletteswap&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 13.008px;"&gt;also could you upload a reproducer for us that way we can actually check locally.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thank you&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 21 Sep 2018 05:25:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177231#M27076</guid>
      <dc:creator>Jonghak_K_Intel</dc:creator>
      <dc:date>2018-09-21T05:25:39Z</dc:date>
    </item>
    <item>
      <title>Hi</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177232#M27077</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;Quick analysis shows the function shall be optimized. We will investigate this more deeply and return back with an answer about 2 weeks late.&lt;/P&gt;

&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Fri, 21 Sep 2018 05:43:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177232#M27077</guid>
      <dc:creator>Pavel_B_Intel1</dc:creator>
      <dc:date>2018-09-21T05:43:51Z</dc:date>
    </item>
    <item>
      <title>Quote:JON J K. (Intel) wrote:</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177233#M27078</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;JON J K. (Intel) wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Hi ,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;have you tried to get status from the function?&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Would you try this and see what it says. ?&lt;/P&gt;

&lt;PRE&gt; status = ippiLUTPalette_8u32u_C1R( pSrc, srcStep, pDst, dstStep, roiSize, pTable, nBitSize);&lt;/PRE&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;and please refer this example page for the usage.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;A href="https://software.intel.com/en-us/ipp-dev-reference-lutpalette-lutpaletteswap"&gt;https://software.intel.com/en-us/ipp-dev-reference-lutpalette-lutpalette...&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;also could you upload a reproducer for us that way we can actually check locally.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thank you&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Yes, that is the first thing I do, and the function returns StsNoErr.&lt;/P&gt;</description>
      <pubDate>Sun, 23 Sep 2018 06:06:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177233#M27078</guid>
      <dc:creator>Alparslan_Y_</dc:creator>
      <dc:date>2018-09-23T06:06:45Z</dc:date>
    </item>
    <item>
      <title>Hi Alparslan Y.</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177234#M27079</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;A href="https://software.intel.com/en-us/user/806386" style="font-size: 11px; background-color: rgb(238, 238, 238);"&gt;Alparslan Y&lt;/A&gt;.&lt;/P&gt;

&lt;P&gt;I confirm your issue. Actually function uses the same srcStep for both source and destination images. We'll fix this issue in next release. Also function has optimization for&amp;nbsp;nBitSize&amp;lt;=4. We consider if it is possible to add optimization for others bit size in next IPP releases.&lt;/P&gt;

&lt;P&gt;Thanks for your feedback.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 15 Oct 2018 23:02:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177234#M27079</guid>
      <dc:creator>Andrey_B_Intel</dc:creator>
      <dc:date>2018-10-15T23:02:50Z</dc:date>
    </item>
    <item>
      <title>Thank you very much, looking</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177235#M27080</link>
      <description>&lt;P&gt;Thank you very much, looking forward to the next release.&lt;/P&gt;</description>
      <pubDate>Mon, 15 Oct 2018 23:30:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Bug-report-ippiLUTPalette-8u-C1R/m-p/1177235#M27080</guid>
      <dc:creator>Alparslan_Y_</dc:creator>
      <dc:date>2018-10-15T23:30:33Z</dc:date>
    </item>
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