<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re:Reg FFT in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1258714#M27558</link>
    <description>&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;Rajendra,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;The max of IPP FFT length depends on the precisions and real or complex data types, namely: &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex DFT (64fc) the length upper bound is 67108863 (2^26 - 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for single precision complex DFT (32fc) the length upper bound is 134217727 (2^27 - 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex FFT (64fc) the length upper bound is 2^27.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex FFT (32fc) the length upper bound is 2^28.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;There are no published perf results, as you may take the IPP Perf system, chose the list of functions you like to test ( e.x. ippsFFTFwd_CToC_32f&lt;/SPAN&gt;), and run the perf system on your specific machine with your environment. The output performance results in clock per element would answer your question.&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Wed, 24 Feb 2021 05:49:11 GMT</pubDate>
    <dc:creator>Gennady_F_Intel</dc:creator>
    <dc:date>2021-02-24T05:49:11Z</dc:date>
    <item>
      <title>Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1257827#M27553</link>
      <description>&lt;P&gt;Sir,&lt;/P&gt;
&lt;P&gt;I am using the Intel XEON processor with Quadcore (8 Thread)&amp;nbsp;&lt;SPAN&gt;VPX3-1220 SBC E3 1505L CPU. We are using intel IPP libraries for signal processing. Please confirm how many parallel FFTs and max. FFT length, I can run using parallel threads. Is there any timing analysis??&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please confirm..&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Advance thanks&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Rajendra&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 20 Feb 2021 17:36:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1257827#M27553</guid>
      <dc:creator>RAJENDRA1983</dc:creator>
      <dc:date>2021-02-20T17:36:07Z</dc:date>
    </item>
    <item>
      <title>Re:Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1258714#M27558</link>
      <description>&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;Rajendra,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;The max of IPP FFT length depends on the precisions and real or complex data types, namely: &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex DFT (64fc) the length upper bound is 67108863 (2^26 - 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for single precision complex DFT (32fc) the length upper bound is 134217727 (2^27 - 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex FFT (64fc) the length upper bound is 2^27.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;for double precision complex FFT (32fc) the length upper bound is 2^28.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;There are no published perf results, as you may take the IPP Perf system, chose the list of functions you like to test ( e.x. ippsFFTFwd_CToC_32f&lt;/SPAN&gt;), and run the perf system on your specific machine with your environment. The output performance results in clock per element would answer your question.&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 24 Feb 2021 05:49:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1258714#M27558</guid>
      <dc:creator>Gennady_F_Intel</dc:creator>
      <dc:date>2021-02-24T05:49:11Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1258839#M27561</link>
      <description>&lt;P&gt;Thank you sir!!&lt;/P&gt;
&lt;P&gt;My soubt is as i am using quad core Processor(8 threads) and i am running FFT 64k parallely four separate application threads.&amp;nbsp; Catch is each FFT consumes two cores of hardware?? In that case i can not run more than two FFTs parallely!! . Hence, requesting you to confirm!!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;However as you suggested, i will check with iperf system and comeback to you sir.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Advance thanks&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Rajendra&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 24 Feb 2021 14:09:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1258839#M27561</guid>
      <dc:creator>RAJENDRA1983</dc:creator>
      <dc:date>2021-02-24T14:09:05Z</dc:date>
    </item>
    <item>
      <title>Re:Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259113#M27564</link>
      <description>&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;&amp;nbsp;&amp;nbsp;Rajendra&lt;/SPAN&gt;,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;“running FFT 64k parallely four separate application threads.&lt;/SPAN&gt;”&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;In that case, you may see the thread oversubscription which might lead to performance degradation.The general recommendation to set 1 OpenMP thread call ( ippSetNumThreads&lt;/SPAN&gt;(1)) &lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial, sans-serif; font-size: 10pt;"&gt;Or explicitly link your application against sequential versions of IPP and didn’t modify your code.&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 25 Feb 2021 03:16:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259113#M27564</guid>
      <dc:creator>Gennady_F_Intel</dc:creator>
      <dc:date>2021-02-25T03:16:05Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259169#M27565</link>
      <description>&lt;P&gt;Dear Sir&lt;/P&gt;
&lt;P&gt;Thank you!!!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Feb 2021 06:51:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259169#M27565</guid>
      <dc:creator>RAJENDRA1983</dc:creator>
      <dc:date>2021-02-25T06:51:57Z</dc:date>
    </item>
    <item>
      <title>Re:Reg FFT</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259206#M27566</link>
      <description>&lt;P&gt;welcome:). The issue is closing and we will no longer respond to this thread.&amp;nbsp;If you require additional assistance from Intel, please start a new thread.&amp;nbsp;Any further interaction in this thread will be considered community only.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 25 Feb 2021 08:17:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Reg-FFT/m-p/1259206#M27566</guid>
      <dc:creator>Gennady_F_Intel</dc:creator>
      <dc:date>2021-02-25T08:17:11Z</dc:date>
    </item>
  </channel>
</rss>

