https://community.intel.com/t5/Intel-Integrated-Performance/DV25-Encoder-Question/m-p/797210#M2840 <P>Hi,</P> <P>I was wondering if someone can help me out with DVCPRO encoding. I have read the S14M-2005 spec. I have cross referenced with the IPP sample encoder. I have also downloaded the DVCAM overview from Sony. One thing I still dont understand is the overflow bit distribution. I looked at the sample code and it seems to just stuff extra bits in a compressed macroblock with free space in the same video segment. But what is the order of the blocks? Is there a special bit that has to be set to tell the decoder that there are extra bits in a macroblock?</P> <P>Thanks</P> <P>PS how come there is no ippiEncodeCoeffsIntra for DV?</P> Thu, 21 Jun 2012 22:48:27 GMT vetroxl 2012-06-21T22:48:27Z https://community.intel.com/t5/Intel-Integrated-Performance/DV25-Encoder-Question/m-p/797210#M2840 <P>Hi,</P> <P>I was wondering if someone can help me out with DVCPRO encoding. I have read the S14M-2005 spec. I have cross referenced with the IPP sample encoder. I have also downloaded the DVCAM overview from Sony. One thing I still dont understand is the overflow bit distribution. I looked at the sample code and it seems to just stuff extra bits in a compressed macroblock with free space in the same video segment. But what is the order of the blocks? Is there a special bit that has to be set to tell the decoder that there are extra bits in a macroblock?</P> <P>Thanks</P> <P>PS how come there is no ippiEncodeCoeffsIntra for DV?</P> Thu, 21 Jun 2012 22:48:27 GMT https://community.intel.com/t5/Intel-Integrated-Performance/DV25-Encoder-Question/m-p/797210#M2840 vetroxl 2012-06-21T22:48:27Z