https://community.intel.com/t5/Intel-Integrated-Performance/TBT4-Simulation/m-p/1589500#M28659 <P>Does Burnside Bridge have a complete IBS file for signal simulation? The problem is described as follows:&nbsp;</P><P>&nbsp;</P><P>CPU: MTL UH</P><P>TBT Retimer: Hayden Bridge(JHL9040R-HBR)</P><P>1、NO IBIS Model in CPU IBIS files</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_0-1713249928440.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53794i3F0464805F348F49/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_0-1713249928440.png" alt="liangsun_0-1713249928440.png" /></span></P><P>2、For TBT retimer model，which only contains GPIO model，no HighSpeed Ports</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_1-1713250026496.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53795iFE38506706636C56/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_1-1713250026496.png" alt="liangsun_1-1713250026496.png" /></span><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_2-1713250051729.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53796iBF668C9D71DCE9DE/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_2-1713250051729.png" alt="liangsun_2-1713250051729.png" /></span></P><P>&nbsp;</P><P>&nbsp;</P> Tue, 16 Apr 2024 06:48:51 GMT liangsun 2024-04-16T06:48:51Z https://community.intel.com/t5/Intel-Integrated-Performance/TBT4-Simulation/m-p/1589500#M28659 <P>Does Burnside Bridge have a complete IBS file for signal simulation? The problem is described as follows:&nbsp;</P><P>&nbsp;</P><P>CPU: MTL UH</P><P>TBT Retimer: Hayden Bridge(JHL9040R-HBR)</P><P>1、NO IBIS Model in CPU IBIS files</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_0-1713249928440.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53794i3F0464805F348F49/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_0-1713249928440.png" alt="liangsun_0-1713249928440.png" /></span></P><P>2、For TBT retimer model，which only contains GPIO model，no HighSpeed Ports</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_1-1713250026496.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53795iFE38506706636C56/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_1-1713250026496.png" alt="liangsun_1-1713250026496.png" /></span><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="liangsun_2-1713250051729.png" style="width: 400px;"><img src="https://community.intel.com/t5/image/serverpage/image-id/53796iBF668C9D71DCE9DE/image-size/medium/is-moderation-mode/true?v=v2&amp;px=400&amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="liangsun_2-1713250051729.png" alt="liangsun_2-1713250051729.png" /></span></P><P>&nbsp;</P><P>&nbsp;</P> Tue, 16 Apr 2024 06:48:51 GMT https://community.intel.com/t5/Intel-Integrated-Performance/TBT4-Simulation/m-p/1589500#M28659 liangsun 2024-04-16T06:48:51Z https://community.intel.com/t5/Intel-Integrated-Performance/TBT4-Simulation/m-p/1590582#M28667 <P style="margin-top: 0pt; margin-bottom: 6pt; font-family: Calibri; font-size: 11.0pt;">Here is&nbsp;Intel® Integrated Performance Primitives software product community support channel. For your&nbsp;support request, please visit&nbsp;<A href="https://community.intel.com/t5/Product-Support-Forums/ct-p/product-support-forums" target="_blank">product-support-forums</A>&nbsp;or other <A href="https://community.intel.com/t5/Developer-Software-Forums/ct-p/developer-software-forums" target="_blank">developer-software-forums</A>&nbsp;, then choose a right channel to post your request. Thank you for understanding.</P> Fri, 19 Apr 2024 01:08:15 GMT https://community.intel.com/t5/Intel-Integrated-Performance/TBT4-Simulation/m-p/1590582#M28667 Ruqiu_C_Intel 2024-04-19T01:08:15Z