https://community.intel.com/t5/Intel-Integrated-Performance/Typo-in-the-documentation-of-ResamplePolyphase/m-p/1725632#M29174 <P>Hi !</P><P>This page :</P><P><A href="https://www.intel.com/content/www/us/en/docs/ipp/developer-guide-reference/2022-2/resamplepolyphase-resamplepolyphasefixed.html" target="_blank">https://www.intel.com/content/www/us/en/docs/ipp/developer-guide-reference/2022-2/resamplepolyphase-resamplepolyphasefixed.html</A></P><P>&nbsp;</P><P>Has a typo in the example section :</P><PRE>state=(IppsResamlingPolyphaseFixed_16s*)ippsMalloc_8u(size);&nbsp;&nbsp;&nbsp;</PRE><P>&nbsp;Should be :</P><PRE>state=(IppsResamplingPolyphaseFixed_16s*)ippsMalloc_8u(size);</PRE><P>&nbsp;</P> Mon, 10 Nov 2025 10:31:36 GMT frayien 2025-11-10T10:31:36Z https://community.intel.com/t5/Intel-Integrated-Performance/Typo-in-the-documentation-of-ResamplePolyphase/m-p/1725632#M29174 <P>Hi !</P><P>This page :</P><P><A href="https://www.intel.com/content/www/us/en/docs/ipp/developer-guide-reference/2022-2/resamplepolyphase-resamplepolyphasefixed.html" target="_blank">https://www.intel.com/content/www/us/en/docs/ipp/developer-guide-reference/2022-2/resamplepolyphase-resamplepolyphasefixed.html</A></P><P>&nbsp;</P><P>Has a typo in the example section :</P><PRE>state=(IppsResamlingPolyphaseFixed_16s*)ippsMalloc_8u(size);&nbsp;&nbsp;&nbsp;</PRE><P>&nbsp;Should be :</P><PRE>state=(IppsResamplingPolyphaseFixed_16s*)ippsMalloc_8u(size);</PRE><P>&nbsp;</P> Mon, 10 Nov 2025 10:31:36 GMT https://community.intel.com/t5/Intel-Integrated-Performance/Typo-in-the-documentation-of-ResamplePolyphase/m-p/1725632#M29174 frayien 2025-11-10T10:31:36Z