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    <title>topic 3 input DMIP node in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/3-input-DMIP-node/m-p/808844#M3784</link>
    <description>I want to derive a node a node that takes 3 input images and gives one output image. There is no in-built node present in DMIP library. So, I derived a SimpleNode_3_1 from "Node" class to take 3 inputs. But following trace messages are printed in trace file. Is this approach is correct? or we can't derive a node that takes 3 input nodes.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Trace to file Trace3node.txt started&lt;BR /&gt;Image 0012FE60 is being created with not good for DMIP buffer.&lt;BR /&gt;Image 0012FDB4 creation failed with code -1&lt;BR /&gt;Input port 0 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Input port 1 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Input port 2 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Output port 0 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Compilation aborted - free input in Graph 02424E30&lt;BR /&gt;Execution aborted - wrong status Normal of Graph 02424E30&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Is it explicitely required to specify Input ports (Input port 0, port1 ,port2) and output port? If yes, then how do we specify them? &lt;BR /&gt;&lt;BR /&gt;</description>
    <pubDate>Thu, 20 Oct 2011 06:18:53 GMT</pubDate>
    <dc:creator>Kishor_D_</dc:creator>
    <dc:date>2011-10-20T06:18:53Z</dc:date>
    <item>
      <title>3 input DMIP node</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/3-input-DMIP-node/m-p/808844#M3784</link>
      <description>I want to derive a node a node that takes 3 input images and gives one output image. There is no in-built node present in DMIP library. So, I derived a SimpleNode_3_1 from "Node" class to take 3 inputs. But following trace messages are printed in trace file. Is this approach is correct? or we can't derive a node that takes 3 input nodes.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Trace to file Trace3node.txt started&lt;BR /&gt;Image 0012FE60 is being created with not good for DMIP buffer.&lt;BR /&gt;Image 0012FDB4 creation failed with code -1&lt;BR /&gt;Input port 0 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Input port 1 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Input port 2 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Output port 0 does not exist in SimpleNode_3_1 02424E90 in iGraph 022ECB88&lt;BR /&gt;Compilation aborted - free input in Graph 02424E30&lt;BR /&gt;Execution aborted - wrong status Normal of Graph 02424E30&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Is it explicitely required to specify Input ports (Input port 0, port1 ,port2) and output port? If yes, then how do we specify them? &lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 20 Oct 2011 06:18:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/3-input-DMIP-node/m-p/808844#M3784</guid>
      <dc:creator>Kishor_D_</dc:creator>
      <dc:date>2011-10-20T06:18:53Z</dc:date>
    </item>
    <item>
      <title>3 input DMIP node</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/3-input-DMIP-node/m-p/808845#M3785</link>
      <description>DMIP is still under development stage. The above functionality is still under scrutiny.</description>
      <pubDate>Tue, 25 Oct 2011 08:43:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/3-input-DMIP-node/m-p/808845#M3785</guid>
      <dc:creator>Kishor_D_</dc:creator>
      <dc:date>2011-10-25T08:43:57Z</dc:date>
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