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    <title>topic Deinterlacing in Intel® Integrated Performance Primitives</title>
    <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818638#M4502</link>
    <description>Hi&lt;BR /&gt;I have a simple question I hope someone may be able to answer:&lt;BR /&gt;&lt;BR /&gt;What pixel format do the Deinterlacing methods (CAVT et al) work in.&lt;BR /&gt;Looking at other forum posts I can see that this question has been asked but I cannot see a definative answer.&lt;BR /&gt;I have seen mention that each plane must be deinterlaced separately for RGBA. But (and I may show my ignorance here!)&lt;BR /&gt;will this work for YUV. i.e. what should I do with YUV420/YUV422/YUV411 for both planar and packed.&lt;BR /&gt;&lt;BR /&gt;Cheers&lt;BR /&gt;</description>
    <pubDate>Mon, 23 May 2011 20:58:54 GMT</pubDate>
    <dc:creator>BatterseaSteve</dc:creator>
    <dc:date>2011-05-23T20:58:54Z</dc:date>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818638#M4502</link>
      <description>Hi&lt;BR /&gt;I have a simple question I hope someone may be able to answer:&lt;BR /&gt;&lt;BR /&gt;What pixel format do the Deinterlacing methods (CAVT et al) work in.&lt;BR /&gt;Looking at other forum posts I can see that this question has been asked but I cannot see a definative answer.&lt;BR /&gt;I have seen mention that each plane must be deinterlaced separately for RGBA. But (and I may show my ignorance here!)&lt;BR /&gt;will this work for YUV. i.e. what should I do with YUV420/YUV422/YUV411 for both planar and packed.&lt;BR /&gt;&lt;BR /&gt;Cheers&lt;BR /&gt;</description>
      <pubDate>Mon, 23 May 2011 20:58:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818638#M4502</guid>
      <dc:creator>BatterseaSteve</dc:creator>
      <dc:date>2011-05-23T20:58:54Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818639#M4503</link>
      <description>&lt;P&gt;Hello, &lt;BR /&gt;&lt;BR /&gt;For your question, there aretwo factors we need consider , &lt;BR /&gt;1) see the ippiman.pdf, &lt;BR /&gt;ipp provide several deinterlacingfunction as &lt;BR /&gt;ippiDeinterlaceFilterCAVT_8u_C1R, &lt;BR /&gt;ippiDeinterlaceFilterTriangle_8u_C1R&lt;BR /&gt;ippiDeinterlaceMotionAdaptive_8u_C1&lt;BR /&gt;&lt;BR /&gt;They are all with the postfix _8u_C1 function, which mean they will accept processes 1 channel or a single plane image. &lt;BR /&gt;&lt;BR /&gt;2) see the IPPumc sample,umc_deinterlacing.cpp&lt;BR /&gt;for (k = 0; k &amp;lt; in-&amp;gt;GetNumPlanes(); k++) {&lt;BR /&gt; VideoData::PlaneInfo srcPlane;&lt;BR /&gt; const Ipp8u *pSrc0; //, *pSrc1;&lt;BR /&gt; Ipp8u *pDst0, *pDst1;&lt;BR /&gt; int srcPitch, dstPitch;&lt;BR /&gt; IppiSize size;&lt;/P&gt;&lt;P&gt; in-&amp;gt;GetPlaneInfo(&amp;amp;srcPlane, k);&lt;BR /&gt; pSrc0 = (const Ipp8u*)in-&amp;gt;GetPlanePointer(k);&lt;BR /&gt;&lt;BR /&gt;So you may see that the Deinterlacing methods mainly support planar format, YUV420,YUV422/YUV411 planarformat should be work. If with RGBA or packed formart, then needuseeach plane. &lt;BR /&gt;&lt;BR /&gt;One more tiny thing Ihave to mention is that may be that some special algorithms like the Motion Adaptive algorithm, it allows use for some packed format, for example, YUY2 packet format (YUYVYUYV..., you may take plane width as 2*plane_width_in_pixels). But forother algorithms, involving horizontally adjacent pixels in the calculations,will be not applicable for packed format.&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Ying H&lt;/P&gt;</description>
      <pubDate>Tue, 24 May 2011 10:41:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818639#M4503</guid>
      <dc:creator>Ying_H_Intel</dc:creator>
      <dc:date>2011-05-24T10:41:35Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818640#M4504</link>
      <description>Hi Ying&lt;BR /&gt;Thanks for your reply - v useful.&lt;BR /&gt;Yes - I gdb'd the simple_player and deduced that it was deinterlacing YUV planar.&lt;BR /&gt;I did actually try putting YUY2 thru the CAVT deinterlacer and it surprisingly gave back a&lt;BR /&gt;dinterlaced frame - but it was not especially great. Howver, since I was also upscaling I could not work out whether it was&lt;BR /&gt;the deinterlacer that made it look bad or the upscaling from SD to HD.&lt;BR /&gt;&lt;BR /&gt;Your comment regarding Motion Adaptive is interesting - our prob is that it requires 4 frames (understandably) - &lt;BR /&gt;which would - in some circumstances - be unacceptable thru our system.&lt;BR /&gt;Once I get the CAVT working I will look at this.&lt;BR /&gt;&lt;BR /&gt;Another couple of questions if you have time....&lt;BR /&gt;&lt;BR /&gt;a) Would the MotionAdaptive be quicker than the CAVT or slower?&lt;BR /&gt;&lt;BR /&gt;b) We need to convert all clips to UYVY. To do this for 420p I call&lt;BR /&gt;ippiYCbCr420To422_Interlace_8u_P3R&lt;BR /&gt;for each 422 plane&lt;BR /&gt; ippiDeinterlaceFilterCAVT_8u_C1R &lt;BR /&gt;ippiYCbCr422_8u_P3C2R&lt;BR /&gt;ippiYCbCr422ToCbYCr422_8u_C2R&lt;BR /&gt;Would it be better (quality/speed) to deinterlace the 420p/411p before conversion?&lt;BR /&gt;&lt;BR /&gt;c) Am I correct in assuming that if I need to resize an interlaced frame I should deiterlace first?&lt;BR /&gt;Or is there another way?&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Cheers&lt;BR /&gt;</description>
      <pubDate>Tue, 24 May 2011 12:57:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818640#M4504</guid>
      <dc:creator>BatterseaSteve</dc:creator>
      <dc:date>2011-05-24T12:57:34Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818641#M4505</link>
      <description>Hi &lt;LABEL&gt;&lt;A hoverintent_s="0" hoverintent_t="undefined" jquery1307070375221="52" rel="/en-us/services/profile/quick_profile.php?is_paid=&amp;amp;user_id=220207" href="http://software.intel.com/en-us/profile/220207/" class="basic"&gt;&lt;STRONG&gt;BatterseaSteve&lt;/STRONG&gt;&lt;/A&gt;&lt;STRONG&gt;, &lt;BR /&gt;&lt;BR /&gt;&lt;/STRONG&gt;a) No, i guess the Motion Adaptive is not quicker as the speed mainly depends on algorithm complex. I hadtried to measure the speed with the tools, tools\perfsys\readme.htm, unlucky, it haven't tested the functions. So you may do the test quicky if you have data ready. &lt;BR /&gt;&lt;BR /&gt;b) Would it be better (quality/speed) to deinterlace the 420p/411p before conversion? and try putting YUY2 thru the CAVT deinterlacer and it surprisingly gave back a dinterlaced frame.&lt;BR /&gt;I thought the answer may depend on the experimental result, especiallyfrom the view of "quality/speed", as "quality" is beyond our control (while the speed's 420p is obviously faster than 422 as less data processing). On thing i maymentionedthat IPP functionsare optimized based oncpu instruction (likeSIMD (SSE) Instructions) on the purpose of speed. It willwork with generalc code anddon'tmodify thedeinterlace algorithm itself, sodon't change the quality itself. &lt;BR /&gt;&lt;BR /&gt;Just commentsthecall sequence, it looks like there aretoo muchformat convertion,whichseems redundant, in order to implement the deinterlaceFilterCAVT.Do you have chancewrite the CAVT algorithm?May be a direct C codeis faster than many formart convertion + the IPPfunction callas your clip is UYVY format. &lt;BR /&gt;&lt;BR /&gt;c) Yes, in general, we suppose deinterlace first, then resize in sample code.&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Ying &lt;BR /&gt;&lt;BR /&gt;&lt;/LABEL&gt;</description>
      <pubDate>Fri, 03 Jun 2011 05:37:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818641#M4505</guid>
      <dc:creator>Ying_H_Intel</dc:creator>
      <dc:date>2011-06-03T05:37:00Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818642#M4506</link>
      <description>Hi Ying&lt;BR /&gt;Thanks for that.&lt;BR /&gt;I went down the route of deinterlacing and then resizing, however I realised when everything was working that what I had is not what I need. The problem with deinterlace on ity's own is that it converts 50i into 25p. So although I can resize an interlaced frame I get a progressive frame from an interlaced frame Doh!.......&lt;BR /&gt;What I really need is field interpolated de-interlacing, which I an guessing is not achievable even with the Motion Adaptive de-interlacer. i.e 50i to 50p&lt;BR /&gt;&lt;BR /&gt;So my next question is, how can I resize 420p/422p/411p without de-interlacing?&lt;BR /&gt;Do I strip out fields - resize and then re-interlace?&lt;BR /&gt;Is ippiResizeYUV422_8u_C2R field aware?&lt;BR /&gt;Any other ideas?&lt;BR /&gt;Cheers&lt;BR /&gt;Steve&lt;BR /&gt;</description>
      <pubDate>Thu, 09 Jun 2011 15:26:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818642#M4506</guid>
      <dc:creator>BatterseaSteve</dc:creator>
      <dc:date>2011-06-09T15:26:29Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818643#M4507</link>
      <description>I Guess to answer at least part on my own question - Motion Adaptive will do field interpolation - at least according to thread&lt;BR /&gt;So one possible route would be to do field interpolated de-interlacing (50i -&amp;gt; 50p), resizing and then restitching&lt;BR /&gt;&lt;A href="http://software.intel.com/en-us/forums/showthread.php?t=78614&amp;amp;o=a&amp;amp;s=lr" target="_blank"&gt;http://software.intel.com/en-us/forums/showthread.php?t=78614&amp;amp;o=a&amp;amp;s=lr&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Looking over at doom9 I spotted&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://forum.doom9.org/showthread.php?t=139102" target="_blank"&gt;http://forum.doom9.org/showthread.php?t=139102&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Which seems to indicate resizing can be done by separating fields - resizing and then reweaving.&lt;BR /&gt;I'll give it a go and se what it looks like - if anyone has any other suggestions I would be keen to hear...&lt;BR /&gt;(It would seem to me that an interlace aware resize function would be hugely useful)</description>
      <pubDate>Fri, 10 Jun 2011 16:47:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818643#M4507</guid>
      <dc:creator>BatterseaSteve</dc:creator>
      <dc:date>2011-06-10T16:47:10Z</dc:date>
    </item>
    <item>
      <title>Deinterlacing</title>
      <link>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818644#M4508</link>
      <description>OK&lt;BR /&gt;So first problem&lt;BR /&gt;&lt;BR /&gt;I thought I had a great idea that wRould allow me to deinterlace, resize and re-interlace in one go&lt;BR /&gt;Use ippiResizeSqrPixel_8u_C1 with src/ds size/rect/step set to resize first top then bottom field lines.&lt;BR /&gt;Hah - I should be so lucky.&lt;BR /&gt;&lt;BR /&gt;I have an interlaced src buffer that is 1472x1080&lt;BR /&gt;(this is a padded Y plane from YUV422p 1440 DV video)&lt;BR /&gt;I want to resize this to an interlaced Y plane of 720x576&lt;BR /&gt;&lt;BR /&gt;so, given a pSrc = src and pDst = dst&lt;BR /&gt;&lt;BR /&gt;I call ippiResizeSqrPixel_8u_C1 for the top(even) lines using&lt;BR /&gt;pSrc = src&lt;BR /&gt;srcSize = {1472,1080}&lt;BR /&gt;srcStep = 2*1472&lt;BR /&gt;srcRoi = {0,0,1440,1079}&lt;BR /&gt;pDst = dst&lt;BR /&gt;dstStep = 2*720&lt;BR /&gt;dstRoi = {0,0,720,575}&lt;BR /&gt;&lt;BR /&gt;I call ippiResizeSqrPixel_8u_C1 for the bottom(odd) lines using&lt;BR /&gt;pSrc = src+1472&lt;BR /&gt;
srcSize = {1472,1080}&lt;BR /&gt;
srcStep = 2*1472&lt;BR /&gt;
srcRoi = {0,1,1440,1080}&lt;BR /&gt;pDst=dst+720&lt;BR /&gt;
dstStep = 2*720&lt;BR /&gt;
dstRoi = {0,1,720,576}&lt;BR /&gt;&lt;BR /&gt;pDst is the same in both cases - the top lines are written into pDst as expected but so are the bottom lines.&lt;BR /&gt;The bottom lines just overwrite the top lines when the second call to Resize is called.&lt;BR /&gt;&lt;BR /&gt;Am I missing something - is this possible - have I goofed - will this even work?&lt;BR /&gt;Anyone - or am I just talking to the ether?&lt;BR /&gt;Steve&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Sat, 11 Jun 2011 15:07:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Integrated-Performance/Deinterlacing/m-p/818644#M4508</guid>
      <dc:creator>BatterseaSteve</dc:creator>
      <dc:date>2011-06-11T15:07:14Z</dc:date>
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