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    <title>Intel® ISA Extensions中的主题 Re: Microinstruction Format</title>
    <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858488#M2158</link>
    <description>&lt;P&gt;The micro-operation representation that underlies the instruction set varies from one generation to another and may undergo minor changes within a given generation. As such, micro-op representation are not part of the instruction set architecture. Your intent to test processor semantics should be done through the instruction set architecture that are documented in &lt;/P&gt;
&lt;P&gt;&lt;A href="http://developer.intel.com/products/processor/manuals/index.htm"&gt;http://developer.intel.com/products/processor/manuals/index.htm&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 14 Jul 2008 19:19:16 GMT</pubDate>
    <dc:creator>SHIH_K_Intel</dc:creator>
    <dc:date>2008-07-14T19:19:16Z</dc:date>
    <item>
      <title>Microinstruction Format</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858487#M2157</link>
      <description>&lt;P&gt;Hi, I'm interested in writing a utility that can be used to test processor schematics, microcode programs, and operating systems. However, I can't find documentation anywhere for Intel's microinstruction formats (i.e. instruction width and fields, etc.)for any of their processors. Is that proprietary information, or is there someplace I can get it?&lt;/P&gt;
&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Sun, 13 Jul 2008 05:41:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858487#M2157</guid>
      <dc:creator>dargueta</dc:creator>
      <dc:date>2008-07-13T05:41:59Z</dc:date>
    </item>
    <item>
      <title>Re: Microinstruction Format</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858488#M2158</link>
      <description>&lt;P&gt;The micro-operation representation that underlies the instruction set varies from one generation to another and may undergo minor changes within a given generation. As such, micro-op representation are not part of the instruction set architecture. Your intent to test processor semantics should be done through the instruction set architecture that are documented in &lt;/P&gt;
&lt;P&gt;&lt;A href="http://developer.intel.com/products/processor/manuals/index.htm"&gt;http://developer.intel.com/products/processor/manuals/index.htm&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 14 Jul 2008 19:19:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858488#M2158</guid>
      <dc:creator>SHIH_K_Intel</dc:creator>
      <dc:date>2008-07-14T19:19:16Z</dc:date>
    </item>
    <item>
      <title>Re: Microinstruction Format</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858489#M2159</link>
      <description>&lt;P&gt;But there has to be some source for BIOS manufacturers, right?&lt;/P&gt;</description>
      <pubDate>Tue, 15 Jul 2008 03:40:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858489#M2159</guid>
      <dc:creator>dargueta</dc:creator>
      <dc:date>2008-07-15T03:40:02Z</dc:date>
    </item>
    <item>
      <title>Re: Microinstruction Format</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858490#M2160</link>
      <description>BIOS uses the ISA to communicate to the CPU :)</description>
      <pubDate>Tue, 15 Jul 2008 19:50:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858490#M2160</guid>
      <dc:creator>SHIH_K_Intel</dc:creator>
      <dc:date>2008-07-15T19:50:58Z</dc:date>
    </item>
    <item>
      <title>Re: Microinstruction Format</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858491#M2161</link>
      <description>Eh...apparently I didn't do enough research when I came up with this idea. What does ISA stand for, and how does it work (in brief, ifit's not too much trouble.I can Google the rest). I was under the impression that the CPU loaded a microinstruction from a hardcoded address in memory (mapped to the BIOS), and that microinstruction went into the control store where it was decoded and executed.</description>
      <pubDate>Wed, 16 Jul 2008 02:50:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Microinstruction-Format/m-p/858491#M2161</guid>
      <dc:creator>dargueta</dc:creator>
      <dc:date>2008-07-16T02:50:04Z</dc:date>
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