AVX alignment requirement

TimP — Sun, 16 Nov 2008 00:00:26 GMT

Public statements imply no special alignment requirements for AVX, and that there will be no particular support for more than the 16-byte alignments supported in 64-bit OS. However, the vmovaps instruction requires 32-byte alignment, even though documents indicate there may be no significant advantage in using it. To avoid breaking applications where VECTOR ALIGNED directives/pragmas are used with Intel compilers, those directives would have to continue to require only 16-byte alignment.

Re: AVX alignment requirement

Mark_B_Intel1 — Wed, 26 Nov 2008 21:10:37 GMT

Hi Tim18,

You are correct, 16-byte alignment is all that can be guaranteed in some contexts, although going forwardcompilers are encouraged to support 32-bit alignments where possible. There are significant performance advantages to being 32-byte aligned if you have 32-byte loads and stores, even for instructions that do not require alignment to behave correctly.

I won't advise anyone to use VMOVDQA ymm flavors - they #GP if not aligned: I have been burned too many times by this in production code. You may want to use them for checking alignment as a debug tool, but in shipping code it would be much safer to use VMOVDQU (or fused load/op) loads and stores.

Regards,

Mark

topic AVX alignment requirement in Intel® ISA Extensions

AVX alignment requirement

Re: AVX alignment requirement