https://community.intel.com/t5/Intel-ISA-Extensions/Instruction-decoder/m-p/907460#M2875 I'm working at the moment with decoding instructions for a given executable (windows or linux) or a part of memory. It can be described as a simple disassembler. Your manuals on Pentium processors are great help but I miss some of the most basic aspects of the processor architecture. (currently I've been using Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1, Basic Architecture and Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A, Instruction Set Reference)<BR /><BR />I would like to ask you about detailed information on instruction decoding the way processor does it. I know all about several fields of an instruction and how they interact with each other. However, I would like to know how the processor does the job by itself (I'm sure it must be an efficent algorithm somehow depend on certain bits of the instruction). For example: Its easy to get the prefix and the opcode itself, but its not as clear with the ModR/M byte. In your manual we can read that opcode defines the existance of ModR/M byte. I know that similar behavior is about ModR/M and SIB (if we have MRM we can calculate whether SIB exists or not). Thats the point of my question - is there a way to guess if there is a ModR/M byte following the opcode without using pre-defined table of opcodes that uses it or not? Same think about displacement and immediate - I know when those fields are used but how can it be done most efficently? (as the decoding unit does it itself, I guess) P<BR /> lease provide me with this information along with detailed description of algorithm used by the decoding unit (if possible). Thank you. Tue, 10 Feb 2009 17:06:50 GMT rediclo 2009-02-10T17:06:50Z https://community.intel.com/t5/Intel-ISA-Extensions/Instruction-decoder/m-p/907460#M2875 I'm working at the moment with decoding instructions for a given executable (windows or linux) or a part of memory. It can be described as a simple disassembler. Your manuals on Pentium processors are great help but I miss some of the most basic aspects of the processor architecture. (currently I've been using Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1, Basic Architecture and Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A, Instruction Set Reference)<BR /><BR />I would like to ask you about detailed information on instruction decoding the way processor does it. I know all about several fields of an instruction and how they interact with each other. However, I would like to know how the processor does the job by itself (I'm sure it must be an efficent algorithm somehow depend on certain bits of the instruction). For example: Its easy to get the prefix and the opcode itself, but its not as clear with the ModR/M byte. In your manual we can read that opcode defines the existance of ModR/M byte. I know that similar behavior is about ModR/M and SIB (if we have MRM we can calculate whether SIB exists or not). Thats the point of my question - is there a way to guess if there is a ModR/M byte following the opcode without using pre-defined table of opcodes that uses it or not? Same think about displacement and immediate - I know when those fields are used but how can it be done most efficently? (as the decoding unit does it itself, I guess) P<BR /> lease provide me with this information along with detailed description of algorithm used by the decoding unit (if possible). Thank you. Tue, 10 Feb 2009 17:06:50 GMT https://community.intel.com/t5/Intel-ISA-Extensions/Instruction-decoder/m-p/907460#M2875 rediclo 2009-02-10T17:06:50Z