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    <title>topic Re: [smp] processor disabled in Intel® ISA Extensions</title>
    <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910692#M2962</link>
    <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/425015"&gt;medinad&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; &lt;BR /&gt;Hi vu64,&lt;BR /&gt;&lt;BR /&gt;a task_scheduler is to manage task, i need to initialize the processors to be able to schedule task on them.&lt;BR /&gt;Anyway I have tried to look at the code and i only could find some .h, I could not find the body of the function.&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Daniel,&lt;BR /&gt;&lt;BR /&gt;I am not 100% sure what are you trying to do, but I will try to help anyway.&lt;BR /&gt;&lt;BR /&gt;Usually, when the computer boots, BIOS initializes BP (boot processor) and APs (application processors) by making them all execute the same code sequence (MSR setup, interrupts, MTRR, microcode update, etc).&lt;BR /&gt;&lt;BR /&gt;BIOS then halts APs so they are effectively disabled and in wait-for-SIPI state until the operating system activates them later in the boot process.&lt;BR /&gt;&lt;BR /&gt;So what you need is to send SIPI packet (using I/O APIC) to disabled APs so they start executing code at some code address in your code.&lt;BR /&gt;&lt;BR /&gt;I am not too familiar with the process myself, but you have pretty good explanation here:&lt;BR /&gt;&lt;A title="http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html" href="http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html" target="_blank"&gt;http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;</description>
    <pubDate>Thu, 24 Dec 2009 13:50:16 GMT</pubDate>
    <dc:creator>levicki</dc:creator>
    <dc:date>2009-12-24T13:50:16Z</dc:date>
    <item>
      <title>[smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910687#M2957</link>
      <description>Hi,&lt;BR /&gt;I am trying to manage the multiprocessor initialization.&lt;BR /&gt;&lt;BR /&gt;I found a little program [1] that implements the multiprocessor specification [2]. but in the processor entries([2] page 4-7) I get that the APs are disabled.&lt;BR /&gt;&lt;BR /&gt;How can I enable the processors??&lt;BR /&gt;Is it a SW or HW problem ?&lt;BR /&gt;&lt;BR /&gt;[1] &lt;A href="http://www.uruk.org/mps/" target="_blank"&gt;http://www.uruk.org/mps/&lt;/A&gt;&lt;BR /&gt;[2] &lt;A href="http://www.intel.com/design/pentium/datashts/242016.HTM" target="_blank"&gt;http://www.intel.com/design/pentium/datashts/242016.HTM&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.</description>
      <pubDate>Thu, 15 Oct 2009 18:12:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910687#M2957</guid>
      <dc:creator>medinad</dc:creator>
      <dc:date>2009-10-15T18:12:31Z</dc:date>
    </item>
    <item>
      <title>Re: [smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910688#M2958</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="margin-top: 5px; width: 100%;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/425015"&gt;medinad&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;Hi,&lt;BR /&gt;I am trying to manage the multiprocessor initialization.&lt;BR /&gt;&lt;BR /&gt;I found a little program [1] that implements the multiprocessor specification [2]. but in the processor entries([2] page 4-7) I get that the APs are disabled.&lt;BR /&gt;&lt;BR /&gt;How can I enable the processors??&lt;BR /&gt;Is it a SW or HW problem ?&lt;BR /&gt;&lt;BR /&gt;[1] &lt;A href="http://www.uruk.org/mps/" target="_blank"&gt;http://www.uruk.org/mps/&lt;/A&gt;&lt;BR /&gt;[2] &lt;A href="http://www.intel.com/design/pentium/datashts/242016.HTM" target="_blank"&gt;http://www.intel.com/design/pentium/datashts/242016.HTM&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Have a look at TBB's task_scheduler_init</description>
      <pubDate>Sat, 17 Oct 2009 10:27:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910688#M2958</guid>
      <dc:creator>vu64</dc:creator>
      <dc:date>2009-10-17T10:27:39Z</dc:date>
    </item>
    <item>
      <title>Re: [smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910689#M2959</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="margin-top: 5px; width: 100%;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/425015"&gt;medinad&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;Hi,&lt;BR /&gt;I am trying to manage the multiprocessor initialization.&lt;BR /&gt;&lt;BR /&gt;I found a little program [1] that implements the multiprocessor specification [2]. but in the processor entries([2] page 4-7) I get that the APs are disabled.&lt;BR /&gt;&lt;BR /&gt;How can I enable the processors??&lt;BR /&gt;Is it a SW or HW problem ?&lt;BR /&gt;&lt;BR /&gt;[1] &lt;A href="http://www.uruk.org/mps/" target="_blank"&gt;http://www.uruk.org/mps/&lt;/A&gt;&lt;BR /&gt;[2] &lt;A href="http://www.intel.com/design/pentium/datashts/242016.HTM" target="_blank"&gt;http://www.intel.com/design/pentium/datashts/242016.HTM&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Daniel,&lt;BR /&gt;&lt;BR /&gt;[2] is a fairly old document. Did you have a look at the ACPI specification?&lt;BR /&gt;&lt;A href="http://www.intel.com/technology/iapc/acpi/index.htm"&gt;http://www.intel.com/technology/iapc/acpi/index.htm&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Kind regards&lt;BR /&gt;Thomas</description>
      <pubDate>Fri, 23 Oct 2009 03:00:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910689#M2959</guid>
      <dc:creator>Thomas_W_Intel</dc:creator>
      <dc:date>2009-10-23T03:00:04Z</dc:date>
    </item>
    <item>
      <title>Re: [smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910690#M2960</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Hi, sorry about delay but i was away last week.&lt;BR /&gt;&lt;BR /&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/123613"&gt;Thomas Willhalm (Intel)&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; &lt;BR /&gt;Daniel,&lt;BR /&gt;&lt;BR /&gt;[2] is a fairly old document. Did you have a look at the ACPI specification?&lt;BR /&gt;&lt;A href="http://www.intel.com/technology/iapc/acpi/index.htm"&gt;http://www.intel.com/technology/iapc/acpi/index.htm&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Kind regards&lt;BR /&gt;Thomas&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;I had a look on it some time ago, with the 3.0b revision. But it do not say much about SMP or initialization.&lt;BR /&gt;Anyway I reach a similar table (5-21) with a flag description (table 5-22) that says &lt;BR /&gt;"If zero, this processor is unusable, and the operating system support will not attempt to use it."&lt;BR /&gt;&lt;BR /&gt;I get zero for the APs(processors 1 to 3, 0 is the BSP). But I can work on Ubuntu with its four processors, so it is not a hw issue.&lt;BR /&gt;&lt;BR /&gt;I am quite confused because the BIOS configuration is not so complex. And only initialization procedure left, but in the ACPI specification do not says anything about it. I have only that old document. I could not find other.&lt;BR /&gt;&lt;BR /&gt;I will look deeply in the ACPI specification this week.&lt;BR /&gt;&lt;BR /&gt;I would like to know what "this processor is unusable" means, because is usable with other system. So i have to find how to initialize them in a proper way. It sounds easy :-P&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;BR /&gt;</description>
      <pubDate>Mon, 26 Oct 2009 19:23:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910690#M2960</guid>
      <dc:creator>medinad</dc:creator>
      <dc:date>2009-10-26T19:23:01Z</dc:date>
    </item>
    <item>
      <title>Re: [smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910691#M2961</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/434068"&gt;vu64&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;
&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
&lt;BR /&gt;Have a look at TBB's task_scheduler_init&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Hi vu64,&lt;BR /&gt;&lt;BR /&gt;a task_scheduler is to manage task, i need to initialize the processors to be able to schedule task on them.&lt;BR /&gt;Anyway I have tried to look at the code and i only could find some .h, I could not find the body of the function.&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;BR /&gt;</description>
      <pubDate>Mon, 26 Oct 2009 19:43:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910691#M2961</guid>
      <dc:creator>medinad</dc:creator>
      <dc:date>2009-10-26T19:43:08Z</dc:date>
    </item>
    <item>
      <title>Re: [smp] processor disabled</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910692#M2962</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/425015"&gt;medinad&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; &lt;BR /&gt;Hi vu64,&lt;BR /&gt;&lt;BR /&gt;a task_scheduler is to manage task, i need to initialize the processors to be able to schedule task on them.&lt;BR /&gt;Anyway I have tried to look at the code and i only could find some .h, I could not find the body of the function.&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Daniel M.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Daniel,&lt;BR /&gt;&lt;BR /&gt;I am not 100% sure what are you trying to do, but I will try to help anyway.&lt;BR /&gt;&lt;BR /&gt;Usually, when the computer boots, BIOS initializes BP (boot processor) and APs (application processors) by making them all execute the same code sequence (MSR setup, interrupts, MTRR, microcode update, etc).&lt;BR /&gt;&lt;BR /&gt;BIOS then halts APs so they are effectively disabled and in wait-for-SIPI state until the operating system activates them later in the boot process.&lt;BR /&gt;&lt;BR /&gt;So what you need is to send SIPI packet (using I/O APIC) to disabled APs so they start executing code at some code address in your code.&lt;BR /&gt;&lt;BR /&gt;I am not too familiar with the process myself, but you have pretty good explanation here:&lt;BR /&gt;&lt;A title="http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html" href="http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html" target="_blank"&gt;http://tldp.org/HOWTO/Linux-i386-Boot-Code-HOWTO/smpboot.html&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 24 Dec 2009 13:50:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/smp-processor-disabled/m-p/910692#M2962</guid>
      <dc:creator>levicki</dc:creator>
      <dc:date>2009-12-24T13:50:16Z</dc:date>
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