Possible error in Software Developer’s Manual

Yeager__David1 — Wed, 10 Jun 2020 18:09:37 GMT

Hi,

I'm referring to this document:

Intel® 64 and IA-32 Architectures
Software Developer’s Manual
Combined Volumes:
1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4

Order Number: 325462-072US
May 2020

There looks to be an error in the instruction operand encoding descriptions when either VEX or EVEX can be used with the same instruction. For example, take a look at the instruction description for GF2P8AFFINEQB on page Vol. 2A 3-445

In the Instruction Operand Encoding table, second row for Op/En B, the entry for the Operand 2 column should say VEX.vvvv (r), not EVEX.vvvv (r) as it currently is written, since the B encoding is for AVX/VEX, not AVX512/EVEX.

This error is repeated throughout many instructions in this manual.

Can you please confirm that this is an error? I'm adding support for these encodings to our compiler and need to verify this.

Thanks,

David Yeager

Thanks. I'll pass this along

MarkC_Intel — Thu, 18 Jun 2020 04:41:54 GMT

Thanks. I'll pass this along to our documentation team.

topic Thanks. I'll pass this along in Intel® ISA Extensions

Possible error in Software Developer’s Manual

Thanks. I'll pass this along