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    <title>topic Intel Xeon 4510 CPU Support for TDX TD-Partitioning and Configuration Queries in Intel® ISA Extensions</title>
    <link>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1681197#M7143</link>
    <description>&lt;P&gt;I have a few questions regarding the Intel Xeon 4510 CPU and its support for TDX TD-partitioning:&lt;/P&gt;&lt;P&gt;1. I want to know&amp;nbsp;if td-partitioning is currently available and if there are any documents about&amp;nbsp;the deployment of td-partitioning?&amp;nbsp;I could only find a&amp;nbsp;repository on GitHub &lt;A title="td-partitioning" href="https://github.com/intel/td-partitioning.git" target="_self"&gt;https://github.com/intel/td-partitioning.git&lt;/A&gt;&amp;nbsp;, but it has already been abandoned.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;2. As the issue window of the GitHub repository is closed, I need to raise the problems I encountered when setting up td-partitioning in this community. There is a problem when using L1-QEMU to launch L1-VMM: "qemu-system-x86_64: cpus are not resettable, terminating". Does the TDX enlightened host L0 not support KVM vcpu reset?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;3. The kernel boot parameter dmesg reports "[ 3.605856] tdx: SEAMCALL failed: leaf 254, error 0xc000050500000000. [ 3.605878] tdx: TDDEBUGCONFIG isn't supported." I cannot find the corresponding function of SEAMCALL leaf 254 in the existing documents. Will this affect td-partitioning?&lt;/P&gt;</description>
    <pubDate>Tue, 08 Apr 2025 00:56:20 GMT</pubDate>
    <dc:creator>ywyao</dc:creator>
    <dc:date>2025-04-08T00:56:20Z</dc:date>
    <item>
      <title>Intel Xeon 4510 CPU Support for TDX TD-Partitioning and Configuration Queries</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1681197#M7143</link>
      <description>&lt;P&gt;I have a few questions regarding the Intel Xeon 4510 CPU and its support for TDX TD-partitioning:&lt;/P&gt;&lt;P&gt;1. I want to know&amp;nbsp;if td-partitioning is currently available and if there are any documents about&amp;nbsp;the deployment of td-partitioning?&amp;nbsp;I could only find a&amp;nbsp;repository on GitHub &lt;A title="td-partitioning" href="https://github.com/intel/td-partitioning.git" target="_self"&gt;https://github.com/intel/td-partitioning.git&lt;/A&gt;&amp;nbsp;, but it has already been abandoned.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;2. As the issue window of the GitHub repository is closed, I need to raise the problems I encountered when setting up td-partitioning in this community. There is a problem when using L1-QEMU to launch L1-VMM: "qemu-system-x86_64: cpus are not resettable, terminating". Does the TDX enlightened host L0 not support KVM vcpu reset?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;3. The kernel boot parameter dmesg reports "[ 3.605856] tdx: SEAMCALL failed: leaf 254, error 0xc000050500000000. [ 3.605878] tdx: TDDEBUGCONFIG isn't supported." I cannot find the corresponding function of SEAMCALL leaf 254 in the existing documents. Will this affect td-partitioning?&lt;/P&gt;</description>
      <pubDate>Tue, 08 Apr 2025 00:56:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1681197#M7143</guid>
      <dc:creator>ywyao</dc:creator>
      <dc:date>2025-04-08T00:56:20Z</dc:date>
    </item>
    <item>
      <title>Re: Intel Xeon 4510 CPU Support for TDX TD-Partitioning and Configuration Queries</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1687787#M7148</link>
      <description>&lt;P&gt;Everything runs great after changing the wrong initramfs.&lt;/P&gt;</description>
      <pubDate>Tue, 06 May 2025 09:09:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1687787#M7148</guid>
      <dc:creator>ywyao</dc:creator>
      <dc:date>2025-05-06T09:09:48Z</dc:date>
    </item>
    <item>
      <title>Re: Intel Xeon 4510 CPU Support for TDX TD-Partitioning and Configuration Queries</title>
      <link>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1693426#M7151</link>
      <description>&lt;P&gt;Hi all,&lt;BR /&gt;I still have a doubt. Does anyone know whether the current TD-partitioning supports to launch multiple L2 TD VMs in a L1 VMM?&lt;BR /&gt;I was able to successfully launch one L2 TD VM, but starting a second one fails. It seems to be related to memmap restrictions in the current implementation.&lt;BR /&gt;Specifically, corresponding config of L1 VMM:&lt;BR /&gt;-append "root=/dev/vda1 rw console=hvc0 nomce no-kvmclock no-steal-acc ignore_loglevel nopat memmap=1023M\$1M memmap=2G\$4G"&lt;BR /&gt;Then set up memmap for L2 VM, I use:&lt;BR /&gt;-object memory-backend-file,mem-path=/dev/mem,size=${MEMORY},share=on,id=mem0 \&lt;BR /&gt;-M q35,accel=kvm,kvm-type=td-part,memory-backend=mem0,max-ram-below-4g=1G&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/intel/td-partitioning/blob/td_part_l0_vmm/TD_PARTITIONING_README.md" target="_self"&gt;https://github.com/intel/td-partitioning/blob/td_part_l0_vmm/TD_PARTITIONING_README.md&lt;/A&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 30 May 2025 00:38:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-ISA-Extensions/Intel-Xeon-4510-CPU-Support-for-TDX-TD-Partitioning-and/m-p/1693426#M7151</guid>
      <dc:creator>ywyao</dc:creator>
      <dc:date>2025-05-30T00:38:43Z</dc:date>
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