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    <title>topic Documentation on Hyper-threading implementation at Nehalem in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820578#M1253</link>
    <description>Hi,&lt;DIV&gt;&lt;SPAN style="font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;DIV&gt;is there any official documentation describing the internals of Hyper-threading as implemented in the Nehalem microarchitecture? I am looking for something similar to the article on the first (P4) implementation published in ITJ 2002. As far as I can tell by comparing experimental results with dual-threaded workloads on the two HT implementations (P4 and Nehalem), the latest implementation must have been subjected under radical changes regarding the way threads share resources, which yields dramatically better performance (reaches up to 2x in some cases). So, I was wondering if these modifications are documented somewhere..&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;Nick&lt;/DIV&gt;</description>
    <pubDate>Thu, 13 May 2010 01:06:54 GMT</pubDate>
    <dc:creator>Anastopoulos__Nikos</dc:creator>
    <dc:date>2010-05-13T01:06:54Z</dc:date>
    <item>
      <title>Documentation on Hyper-threading implementation at Nehalem</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820578#M1253</link>
      <description>Hi,&lt;DIV&gt;&lt;SPAN style="font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;DIV&gt;is there any official documentation describing the internals of Hyper-threading as implemented in the Nehalem microarchitecture? I am looking for something similar to the article on the first (P4) implementation published in ITJ 2002. As far as I can tell by comparing experimental results with dual-threaded workloads on the two HT implementations (P4 and Nehalem), the latest implementation must have been subjected under radical changes regarding the way threads share resources, which yields dramatically better performance (reaches up to 2x in some cases). So, I was wondering if these modifications are documented somewhere..&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;Nick&lt;/DIV&gt;</description>
      <pubDate>Thu, 13 May 2010 01:06:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820578#M1253</guid>
      <dc:creator>Anastopoulos__Nikos</dc:creator>
      <dc:date>2010-05-13T01:06:54Z</dc:date>
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    <item>
      <title>Documentation on Hyper-threading implementation at Nehalem</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820579#M1254</link>
      <description>Don't know if this is what you are looking for:&lt;BR /&gt;&lt;A href="http://software.intel.com/en-us/articles/performance-insights-to-intel-hyper-threading-technology/"&gt;http://software.intel.com/en-us/articles/performance-insights-to-intel-hyper-threading-technology/&lt;/A&gt;&lt;BR /&gt;but it's worth a look.</description>
      <pubDate>Thu, 13 May 2010 12:33:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820579#M1254</guid>
      <dc:creator>Tudor</dc:creator>
      <dc:date>2010-05-13T12:33:58Z</dc:date>
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    <item>
      <title>Documentation on Hyper-threading implementation at Nehalem</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820580#M1255</link>
      <description>Not exactly what I was looking for, but a good overview anyway. Thanks Tudor!</description>
      <pubDate>Fri, 14 May 2010 10:28:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820580#M1255</guid>
      <dc:creator>Anastopoulos__Nikos</dc:creator>
      <dc:date>2010-05-14T10:28:53Z</dc:date>
    </item>
    <item>
      <title>Documentation on Hyper-threading implementation at Nehalem</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820581#M1256</link>
      <description>The &lt;A href="http://www.intel.com/assets/pdf/manual/248966.pdf"&gt;Intel 64 and IA 32 Architecture Optimization Reference Manual &lt;/A&gt;contains a comparison of the implementations of Intel Hyper-Threading technology in NetBurst and Nehalem architecture. Furthermore, section 2.2.9 contains a list of the ressources in the core that are shared or partitioned by the 2 threads.</description>
      <pubDate>Fri, 14 May 2010 13:32:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Documentation-on-Hyper-threading-implementation-at-Nehalem/m-p/820581#M1256</guid>
      <dc:creator>Thomas_W_Intel</dc:creator>
      <dc:date>2010-05-14T13:32:43Z</dc:date>
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