<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Can i use Peterson Lock as SMP lock?? in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836626#M1614</link>
    <description>Yes, of course. However, then hardware has to support either sequentially-consistent memory model or #StoreLoad style memory fences.&lt;BR /&gt;</description>
    <pubDate>Wed, 18 Aug 2010 10:18:14 GMT</pubDate>
    <dc:creator>Dmitry_Vyukov</dc:creator>
    <dc:date>2010-08-18T10:18:14Z</dc:date>
    <item>
      <title>Can i use Peterson Lock as SMP lock??</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836625#M1613</link>
      <description>Hi,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Can i use Peterson Lock as SMP Lock, if the processor doesn't support Get-and-Set instruction?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks,&lt;/DIV&gt;&lt;DIV&gt;Mani&lt;/DIV&gt;</description>
      <pubDate>Wed, 18 Aug 2010 10:11:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836625#M1613</guid>
      <dc:creator>rkmanikanta</dc:creator>
      <dc:date>2010-08-18T10:11:02Z</dc:date>
    </item>
    <item>
      <title>Can i use Peterson Lock as SMP lock??</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836626#M1614</link>
      <description>Yes, of course. However, then hardware has to support either sequentially-consistent memory model or #StoreLoad style memory fences.&lt;BR /&gt;</description>
      <pubDate>Wed, 18 Aug 2010 10:18:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836626#M1614</guid>
      <dc:creator>Dmitry_Vyukov</dc:creator>
      <dc:date>2010-08-18T10:18:14Z</dc:date>
    </item>
    <item>
      <title>Can i use Peterson Lock as SMP lock??</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836627#M1615</link>
      <description>Peterson's lock was designed for precisely this scenario. However, you need to ensure that the operations become visible to the other processors in the right order. The algorithm assumes a sequentially-consistent memory model, and on some platforms this will require memory fence operations before and/or after some of the stores and loads.&lt;BR /&gt;&lt;BR /&gt;You also need to bear in mind that Peterson's lock is not a replacement for a general-purpose mutex --- each thread that tries to access the critical section must have a specific ID. The basic algorithm only works with 2 specific threads, though it is possible to extend it to more.</description>
      <pubDate>Wed, 18 Aug 2010 14:33:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836627#M1615</guid>
      <dc:creator>anthony_williams</dc:creator>
      <dc:date>2010-08-18T14:33:02Z</dc:date>
    </item>
    <item>
      <title>Can i use Peterson Lock as SMP lock??</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836628#M1616</link>
      <description>Hi,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;thanks for the reply.&lt;/DIV&gt;&lt;DIV&gt;But how can we extend Peterson lock for N-processes?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks,&lt;/DIV&gt;&lt;DIV&gt;Mani&lt;/DIV&gt;</description>
      <pubDate>Fri, 20 Aug 2010 12:45:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836628#M1616</guid>
      <dc:creator>rkmanikanta</dc:creator>
      <dc:date>2010-08-20T12:45:17Z</dc:date>
    </item>
    <item>
      <title>Can i use Peterson Lock as SMP lock??</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836629#M1617</link>
      <description>&lt;DIV&gt;This paper describes a technique to convert two-wayPeterson'slock into N-way:&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;A href="http://www.google.com/url?sa=t&amp;amp;source=web&amp;amp;cd=10&amp;amp;ved=0CDcQFjAJ&amp;amp;url=http%3A%2F%2Fciteseerx.ist.psu.edu%2Fviewdoc%2Fdownload%3Fdoi%3D10.1.1.86.9087%26rep%3Drep1%26type%3Dpdf&amp;amp;ei=SLN9TMjvIIKnnQebi_H3AQ&amp;amp;usg=AFQjCNHYzNkfxUJVNVbe1-lDHV5LKOeheQ"&gt;http://www.google.com/url?sa=t&amp;amp;source=web&amp;amp;cd=10&amp;amp;ved=0CDcQFjAJ&amp;amp;url=http%3A%2F%2Fciteseerx.ist.psu.edu%2Fviewdoc%2Fdownload%3Fdoi%3D10.1.1.86.9087%26rep%3Drep1%26type%3Dpdf&amp;amp;ei=SLN9TMjvIIKnnQebi_H3AQ&amp;amp;usg=AFQjCNHYzNkfxUJVNVbe1-lDHV5LKOeheQ&lt;/A&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I think they call it a filter lock or something...&lt;/DIV&gt;</description>
      <pubDate>Wed, 01 Sep 2010 02:01:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Can-i-use-Peterson-Lock-as-SMP-lock/m-p/836629#M1617</guid>
      <dc:creator>Chris_M__Thomasson</dc:creator>
      <dc:date>2010-09-01T02:01:32Z</dc:date>
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  </channel>
</rss>

