https://community.intel.com/t5/Intel-Moderncode-for-Parallel/running-time/m-p/838994#M1646 hi,<BR />Thanks Tim for your answer but if you don't mind i want to know more details.<BR />I 'm not understanding exactly what you had wrote.<BR />Please can you explain more!!!!<BR />(I'm sorry to tell you this, don't you mind if you write in french!!!!!!!!!!) <BR />Thanks a lot again.<BR /> Wed, 14 Apr 2010 21:34:37 GMT sammoura 2010-04-14T21:34:37Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/running-time/m-p/838994#M1646 hi,<BR />Thanks Tim for your answer but if you don't mind i want to know more details.<BR />I 'm not understanding exactly what you had wrote.<BR />Please can you explain more!!!!<BR />(I'm sorry to tell you this, don't you mind if you write in french!!!!!!!!!!) <BR />Thanks a lot again.<BR /> Wed, 14 Apr 2010 21:34:37 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/running-time/m-p/838994#M1646 sammoura 2010-04-14T21:34:37Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/running-time/m-p/838995#M1647 Supposing that you were using MKL library, which is supplied with icc, you can read in the docs about how it has preferences for certain data alignments. Certain matrix sizes would permit more even division of work among threads with more frequent favorable alignment (16-byte or cache line alignment) so as to reduce time spent in scalar remainder loops. Dependence of performance on special alignments for SSE2 vectorization has been reduced in more recent architecture designs, but is about to increase again with the advent of AVX vectorization with its 32-byte alignment preference. Thu, 15 Apr 2010 13:17:50 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/running-time/m-p/838995#M1647 TimP 2010-04-15T13:17:50Z