topic Store Buffer Forwarding Restriction on Size in Intel® Moderncode for Parallel Architectures https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775224#M178 But that pertains to theIntel NetBurst microarchitecture. I know the document says "Fixing store-forwarding problems for Intel NetBurst microarchitecture generally also avoids problems on Pentium M, Intel Core Duo and Intel Core 2 Duo processors", but I want to induce the "problem" (to avoid using a memory barrier), so I'm asking about the Intel Core microarchitecture (specifically, about the contents ofTable 3-2). Sat, 03 Sep 2011 18:08:53 GMT duarten 2011-09-03T18:08:53Z Store Buffer Forwarding Restriction on Size https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775222#M176 <DIV> <P>Hi,</P> <P>In reading section3.6.5.1 of the most recentIntel 64 and IA-32ArchitecturesOptimization Reference Manual, it seems that for theIntel Core microarchitecture a large load after a small store never stalls (for example, a word aligned 32 bit load after an 8 bit store). Am I interpreting it correctly?</P> Thank you,<BR /> Duarte Nunes </DIV> Sun, 07 Aug 2011 14:17:26 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775222#M176 duarten 2011-08-07T14:17:26Z Store Buffer Forwarding Restriction on Size https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775223#M177 <span class="lia-inline-image-display-wrapper"><img src="https://community.intel.com/skins/images/7B13F55A7CE623EF42E69096FA81A3A1/2021_redesign/images/image_not_found.png" /></span> Sat, 03 Sep 2011 13:53:31 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775223#M177 jose-jesus-ambriz-me 2011-09-03T13:53:31Z Store Buffer Forwarding Restriction on Size https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775224#M178 But that pertains to theIntel NetBurst microarchitecture. I know the document says "Fixing store-forwarding problems for Intel NetBurst microarchitecture generally also avoids problems on Pentium M, Intel Core Duo and Intel Core 2 Duo processors", but I want to induce the "problem" (to avoid using a memory barrier), so I'm asking about the Intel Core microarchitecture (specifically, about the contents ofTable 3-2). Sat, 03 Sep 2011 18:08:53 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Store-Buffer-Forwarding-Restriction-on-Size/m-p/775224#M178 duarten 2011-09-03T18:08:53Z