https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-is-processor-cpu-thread-affinity-implemented-at-kernel-level/m-p/886279#M3524 I have been investigating on how a kernel ensures that a thread is locked to a processor using affinity.<BR /> <BR /> <BR /> Is there a special opcode for that locking? <BR /> <BR /> or <BR /> <BR /> there has to be issue slot management on the part of the kernel for each machine instruction fed into the pipeline?<BR /> <BR /> Thanks. Mon, 19 May 2008 05:57:58 GMT garik4788 2008-05-19T05:57:58Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-is-processor-cpu-thread-affinity-implemented-at-kernel-level/m-p/886279#M3524 I have been investigating on how a kernel ensures that a thread is locked to a processor using affinity.<BR /> <BR /> <BR /> Is there a special opcode for that locking? <BR /> <BR /> or <BR /> <BR /> there has to be issue slot management on the part of the kernel for each machine instruction fed into the pipeline?<BR /> <BR /> Thanks. Mon, 19 May 2008 05:57:58 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-is-processor-cpu-thread-affinity-implemented-at-kernel-level/m-p/886279#M3524 garik4788 2008-05-19T05:57:58Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-is-processor-cpu-thread-affinity-implemented-at-kernel-level/m-p/886280#M3525 <P>Thread affinity is performed in software. The application requests the operating system to restrict the scheduling to one or more processors usualy by way of a bit mask (but some O/S use other data structures to specify the desired affinity). Most O/S's have a bit mask of permitted processor(s) while some O/S's also have a preferred processor mask as well as other selection chriteria.</P> <P>The restriction can be simple or complex depending on the O/S</P> <P>Only processor(s) selected by bitmask (or list if list based)<BR />Preference for processor(s) selected by bitmask (or list if list based)<BR />Processor(s) sharing the same cache<BR />Processor(s) NOT sharing the same cache<BR />Processor(s) in the same package<BR />Processor(s) NOT in the same package<BR />Processor(s) in the same NUMA node<BR />Processor(s) NOT in the same NUMA node<BR />etc...<BR /></P> Tue, 20 May 2008 03:27:33 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-is-processor-cpu-thread-affinity-implemented-at-kernel-level/m-p/886280#M3525 jimdempseyatthecove 2008-05-20T03:27:33Z