https://community.intel.com/t5/Intel-Moderncode-for-Parallel/does-Multicore-come-with-multimple-sets-of-SIMD-register/m-p/889794#M3741 <P>Each core, and each logical CPU, has its own physical registers. Race conditions apply only when writingto shared memory locations.</P> <P>If your application truly benefits from a large number of program-accessible registers, 64-bit mode may be useful (16 xmm registers).</P> Mon, 12 May 2008 02:36:15 GMT TimP 2008-05-12T02:36:15Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/does-Multicore-come-with-multimple-sets-of-SIMD-register/m-p/889793#M3740 <BR />A single core processor which support SSE2 have 8 corresponding registers.<BR />Does the multicore processor have dedicated and independent registers for each of its core ?<BR /><BR />I have a program with utilize many SSE2 instructions. I'm thinking to speed up it with <BR />threading tech by intel TBB. I wonder if the SSE2 registers will suffer the <B>race <A href="http://en.wikipedia.org/wiki/Hazard_%28logic%29" title="Hazard (logic)">hazard</A></B> problem.<BR /><BR />Thanks!<BR /> Mon, 12 May 2008 02:16:51 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/does-Multicore-come-with-multimple-sets-of-SIMD-register/m-p/889793#M3740 intelbenz 2008-05-12T02:16:51Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/does-Multicore-come-with-multimple-sets-of-SIMD-register/m-p/889794#M3741 <P>Each core, and each logical CPU, has its own physical registers. Race conditions apply only when writingto shared memory locations.</P> <P>If your application truly benefits from a large number of program-accessible registers, 64-bit mode may be useful (16 xmm registers).</P> Mon, 12 May 2008 02:36:15 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/does-Multicore-come-with-multimple-sets-of-SIMD-register/m-p/889794#M3741 TimP 2008-05-12T02:36:15Z