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    <title>topic HT processors and context switching? in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/HT-processors-and-context-switching/m-p/912590#M4700</link>
    <description>&lt;P&gt;&lt;FONT face="Arial" size="2"&gt;What is theoverhead in HT processors compared to traditional processors for&lt;BR /&gt;context switching,at least using Win32 and C++?&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="Arial" size="2"&gt;It will be better for students like me...because academia is not interested in MS technologies... Anything in C++ will be much more interesting than C#... :D&lt;/FONT&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 17 Aug 2007 21:03:15 GMT</pubDate>
    <dc:creator>postaquestion</dc:creator>
    <dc:date>2007-08-17T21:03:15Z</dc:date>
    <item>
      <title>HT processors and context switching?</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/HT-processors-and-context-switching/m-p/912590#M4700</link>
      <description>&lt;P&gt;&lt;FONT face="Arial" size="2"&gt;What is theoverhead in HT processors compared to traditional processors for&lt;BR /&gt;context switching,at least using Win32 and C++?&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="Arial" size="2"&gt;It will be better for students like me...because academia is not interested in MS technologies... Anything in C++ will be much more interesting than C#... :D&lt;/FONT&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 17 Aug 2007 21:03:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/HT-processors-and-context-switching/m-p/912590#M4700</guid>
      <dc:creator>postaquestion</dc:creator>
      <dc:date>2007-08-17T21:03:15Z</dc:date>
    </item>
    <item>
      <title>Re: HT processors and context switching?</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/HT-processors-and-context-switching/m-p/912591#M4701</link>
      <description>I don't think a useful answer is possible without more definition of what you mean. The HT related issue of giving one or the other of 2 running threads priority on shared resources, compared with 2 threads running on a single core CPU, is of most interest when supporting a few specific applications such as Oracle. It was more interesting when there were more HT than dual core CPUs. On the dual core CPUs, there may be shared cache and bus resources, but the term context switching has even less meaning in the competition for those resources.&lt;BR /&gt;If you are talking about the use of the HT terminology for Itanium switch on event multi-tasking, the overhead for switching there is significantly greater than for past Xeon HT CPUs.&lt;BR /&gt;If you are talking about traditional meaning of context switching, it's hard to see how HT is related, unless you have a specific situation in mind.&lt;BR /&gt;</description>
      <pubDate>Sat, 18 Aug 2007 19:06:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/HT-processors-and-context-switching/m-p/912591#M4701</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2007-08-18T19:06:49Z</dc:date>
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