https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-expensive-is-LFENCE/m-p/978741#M5677 I'm thinking this won't have any effect on dependent loads<BR />since in effect the pipeline is going to stall anyway until<BR />the load has completed. Is that basically right? I only<BR />have a P3 so I can't test it out for now. Wed, 31 Aug 2005 08:29:08 GMT jseigh 2005-08-31T08:29:08Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-expensive-is-LFENCE/m-p/978740#M5676 I'm guessing the new disambiguated memory stuff will<BR />break dependent load ordering. If so, what will be<BR />the effect on some of the scalability techniques that<BR />use dependent load ordering if they have to start<BR />using LFENCE on all dependent loads? Wed, 24 Aug 2005 20:12:15 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-expensive-is-LFENCE/m-p/978740#M5676 jseigh 2005-08-24T20:12:15Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-expensive-is-LFENCE/m-p/978741#M5677 I'm thinking this won't have any effect on dependent loads<BR />since in effect the pipeline is going to stall anyway until<BR />the load has completed. Is that basically right? I only<BR />have a P3 so I can't test it out for now. Wed, 31 Aug 2005 08:29:08 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/How-expensive-is-LFENCE/m-p/978741#M5677 jseigh 2005-08-31T08:29:08Z