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    <title>topic Hyper-Threading Processor in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyper-Threading-Processor/m-p/984278#M5803</link>
    <description>Below table is obtained from Intel online training on How to detect an HT processor.&lt;BR /&gt;&lt;BR /&gt;It desible the register ebx bits to indentify the APIC IDs for all the processors.&lt;BR /&gt;ebx Bit	   31 30 29 28 27 26 25  24&lt;BR /&gt;-----------------------------------&lt;BR /&gt;APIC ID	   P  P  P  P  P  P  P/L P/L&lt;BR /&gt;-----------------------------------&lt;BR /&gt;1 &lt;BR /&gt;processor  X  X  X  X  X  X   X	 X&lt;BR /&gt;-----------------------------------&lt;BR /&gt;2 logical &lt;BR /&gt;processors X  X	 X  X  X  X   X	 L0/1&lt;BR /&gt;-----------------------------------&lt;BR /&gt;4 logical &lt;BR /&gt;processors X  X	 X  X  X  X  L3/4 L3/4&lt;BR /&gt;--------------------------------------&lt;BR /&gt;&lt;BR /&gt;Referring to the table above, why is it 4 logical processors,at the bits 24 and 25 is L3/4 ? Why not at bit 24 and 25 respectively L0/1 and L2/3?&lt;BR /&gt;What is L0/1, L3/4 represent? What does it mean?&lt;BR /&gt;&lt;BR /&gt;Thank you!</description>
    <pubDate>Mon, 29 Sep 2003 13:22:56 GMT</pubDate>
    <dc:creator>yaumeileng</dc:creator>
    <dc:date>2003-09-29T13:22:56Z</dc:date>
    <item>
      <title>Hyper-Threading Processor</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyper-Threading-Processor/m-p/984278#M5803</link>
      <description>Below table is obtained from Intel online training on How to detect an HT processor.&lt;BR /&gt;&lt;BR /&gt;It desible the register ebx bits to indentify the APIC IDs for all the processors.&lt;BR /&gt;ebx Bit	   31 30 29 28 27 26 25  24&lt;BR /&gt;-----------------------------------&lt;BR /&gt;APIC ID	   P  P  P  P  P  P  P/L P/L&lt;BR /&gt;-----------------------------------&lt;BR /&gt;1 &lt;BR /&gt;processor  X  X  X  X  X  X   X	 X&lt;BR /&gt;-----------------------------------&lt;BR /&gt;2 logical &lt;BR /&gt;processors X  X	 X  X  X  X   X	 L0/1&lt;BR /&gt;-----------------------------------&lt;BR /&gt;4 logical &lt;BR /&gt;processors X  X	 X  X  X  X  L3/4 L3/4&lt;BR /&gt;--------------------------------------&lt;BR /&gt;&lt;BR /&gt;Referring to the table above, why is it 4 logical processors,at the bits 24 and 25 is L3/4 ? Why not at bit 24 and 25 respectively L0/1 and L2/3?&lt;BR /&gt;What is L0/1, L3/4 represent? What does it mean?&lt;BR /&gt;&lt;BR /&gt;Thank you!</description>
      <pubDate>Mon, 29 Sep 2003 13:22:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyper-Threading-Processor/m-p/984278#M5803</guid>
      <dc:creator>yaumeileng</dc:creator>
      <dc:date>2003-09-29T13:22:56Z</dc:date>
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