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    <title>topic Re: Simultaneous access to arrays in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992918#M6296</link>
    <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Hello,&lt;/DIV&gt;
&lt;DIV&gt;The Intel Thread Checker will only report a storage conflict if threads can simultaneously access the same array elements. In the following simple example, all threads access the same array, but never the same elements so Thread Checker will not report storage conflicts or errors:&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#pragma omp parallel for&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;for (i = 0; i &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; a&lt;I&gt; = 0;&lt;/I&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;However, Thread Checker will report errors for the following code because the threads can access the same elements of the array:&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#pragma omp parallel for&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;for (i = 0; i &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; for (j = 0; j &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; a&lt;J&gt; = 0;&lt;/J&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Best regards,&lt;/DIV&gt;
&lt;DIV&gt;Henry&lt;/DIV&gt;&lt;/DIV&gt;</description>
    <pubDate>Thu, 07 Apr 2005 07:24:16 GMT</pubDate>
    <dc:creator>Henry_G_Intel</dc:creator>
    <dc:date>2005-04-07T07:24:16Z</dc:date>
    <item>
      <title>Simultaneous access to arrays</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992915#M6293</link>
      <description>Thread Checker reports several conflicts when our application&lt;BR /&gt;accesses arrays simultaneously from several threads.&lt;BR /&gt;&lt;BR /&gt;I couldn't find a note in the documentation whether the VTune TC&lt;BR /&gt;makes a distinction for the array elements accessed or if any&lt;BR /&gt;concurrent access to the array (regardless what index) is reported&lt;BR /&gt;as a conflict.&lt;BR /&gt;&lt;BR /&gt;In other words, if thread 1 always accesses the array at&lt;BR /&gt;index 1 and thread 2 concurrently accesses index 2, will this &lt;BR /&gt;arouse a conflict ?&lt;BR /&gt;&lt;BR /&gt;regards,&lt;BR /&gt;J. Barnholt</description>
      <pubDate>Mon, 04 Apr 2005 15:06:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992915#M6293</guid>
      <dc:creator>jan_barnholt</dc:creator>
      <dc:date>2005-04-04T15:06:45Z</dc:date>
    </item>
    <item>
      <title>Re: Simultaneous access to arrays</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992916#M6294</link>
      <description>I wouldn't be surprised if a potential conflict were always reported for simultaneous access to the same array.  I can't imagine a useful case simple enough for easy diagnosis.  Even if there is no actual conflict, but false sharing is likely, the warning could be helpful.&lt;BR /&gt;I also would be interested in a more authoritative answer.</description>
      <pubDate>Mon, 04 Apr 2005 20:40:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992916#M6294</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2005-04-04T20:40:45Z</dc:date>
    </item>
    <item>
      <title>Re: Simultaneous access to arrays</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992917#M6295</link>
      <description>I suppose this question might be appropriate for the threading forum.</description>
      <pubDate>Mon, 04 Apr 2005 20:42:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992917#M6295</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2005-04-04T20:42:34Z</dc:date>
    </item>
    <item>
      <title>Re: Simultaneous access to arrays</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992918#M6296</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Hello,&lt;/DIV&gt;
&lt;DIV&gt;The Intel Thread Checker will only report a storage conflict if threads can simultaneously access the same array elements. In the following simple example, all threads access the same array, but never the same elements so Thread Checker will not report storage conflicts or errors:&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#pragma omp parallel for&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;for (i = 0; i &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; a&lt;I&gt; = 0;&lt;/I&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;However, Thread Checker will report errors for the following code because the threads can access the same elements of the array:&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#pragma omp parallel for&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;for (i = 0; i &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; for (j = 0; j &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; a&lt;J&gt; = 0;&lt;/J&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Best regards,&lt;/DIV&gt;
&lt;DIV&gt;Henry&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 07 Apr 2005 07:24:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992918#M6296</guid>
      <dc:creator>Henry_G_Intel</dc:creator>
      <dc:date>2005-04-07T07:24:16Z</dc:date>
    </item>
    <item>
      <title>Re: Simultaneous access to arrays</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992919#M6297</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Hi Tim,&lt;/DIV&gt;
&lt;DIV&gt;Good point about false sharing but it's a performance issue rather than a correctness issue. The following code will likely exhibit false sharing because the shared array is small enough to fit ina single cache line:&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#define THREADS 4&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;double sum = 0.0, sum_local[THREADS];&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;#pragma omp parallel&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;{&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; int id = omp_get_thread_num ();&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; sum_local[id] = 0.0;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; #pragma omp for&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; for (i = 0; i &amp;lt; N; i++)&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; sum_local[id] += x&lt;I&gt; * y&lt;I&gt;;&lt;/I&gt;&lt;/I&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; #pragma omp atomic&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt; sum += sum_local[id];&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT face="Courier New"&gt;}&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Performance may suffer because the threads repeatedly invalid each other's cache, but the parallel code is correct so Thread Checker will not report any errors. VTune is the tool to use to find false sharing.&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Best regards,&lt;/DIV&gt;
&lt;DIV&gt;Henry&lt;/DIV&gt;</description>
      <pubDate>Thu, 07 Apr 2005 07:35:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Simultaneous-access-to-arrays/m-p/992919#M6297</guid>
      <dc:creator>Henry_G_Intel</dc:creator>
      <dc:date>2005-04-07T07:35:15Z</dc:date>
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