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    <title>topic   in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102966#M7341</link>
    <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;Thanks for you valuable feedback. i just verified the points u denoted here.&lt;/P&gt;

&lt;P&gt;first, I have printed FFC control register(0x38d) just before exiting the program, i got the proper configured value also there is No perf utility installed on my machine.&lt;/P&gt;

&lt;P&gt;I have disabled NMI on VMs and tried the same program , but there is no change in the result(Please find below results).&lt;/P&gt;

&lt;UL&gt;
	&lt;LI&gt;FFC control:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 546&lt;/LI&gt;
	&lt;LI&gt;FFC 0 instr retired:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 6691&lt;/LI&gt;
	&lt;LI&gt;FFC 1 core cycles:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp; &amp;lt;---&lt;/LI&gt;
	&lt;LI&gt;FFC 2 ref cycles:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 37601&lt;/LI&gt;
&lt;/UL&gt;

&lt;P&gt;-Sakthivel S OM&lt;/P&gt;</description>
    <pubDate>Fri, 07 Oct 2016 13:57:40 GMT</pubDate>
    <dc:creator>Sakthivel_S_</dc:creator>
    <dc:date>2016-10-07T13:57:40Z</dc:date>
    <item>
      <title>Understanding vPMC behaviour for FFCs accross multiple architecture</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102963#M7338</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;As I said in another &lt;A href="https://software.intel.com/en-us/forums/intel-moderncode-for-parallel-architectures/topic/673602"&gt;post&lt;/A&gt;, I am trying to optimize my huge application performance.. So I am starting up Intel PMU programming. Before entering into my real task, I wrote a standalone program (let say., msr_test) to make sure the PMU counters&amp;nbsp; visibility of 3 FFCs &amp;amp; 4programmable counters. When I run msr_test on a bare metal machine I got all FFCs having some values, if I run same program on my first VM(VM1), I got FFC0 (inst. retired )=&amp;lt;non zero&amp;gt; and remaining FFC1(core counts) and FFC2(ref. core count)&amp;nbsp; are always 0.Then I decided to confirm the behavior with another VM (VM2), Only FFC1 =0 remaining two counters are non 0.Which looks very strange to me, I run this multiple time and I am sure about the about results. What I absorbed is, all three machines are running on different Architecture. Does It make difference on Fixed counters(non-arch)also.&lt;/P&gt;

&lt;P&gt;Below are my code sniff. Please check and help to understand the PMC programming.&lt;/P&gt;

&lt;P&gt;&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;{ MSR_WRITE, 0x38d, 0x222, 0x00 },      // ia32_perf_fixed_ctr_ctrl 0x222 is user mode for all 3 counters
{ MSR_WRITE, 0x38d, 0x333, 0x00 },     //when I say 0x333 there  I don’t get 0s any of the machines
       

MSR_WRITE is nothing but : write_msr(msrops-&amp;gt;ecx, msrops-&amp;gt;eax, msrops-&amp;gt;edx);
Which inturns		:__asm__ __volatile__("wrmsr" : : "c"(ecx), "a"(eax), "d"(edx));
&lt;/PRE&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;P.S:&lt;/P&gt;

&lt;P&gt;Hypervisor(ESXi5.5) and vpmc.freezMode =”GUEST”&lt;/P&gt;

&lt;P&gt;Both machines having same OS(Linux RHEL).&lt;/P&gt;

&lt;P&gt;HW details: Bare metal code name= 06_3AH,VM1=06_2CH,VM2=06_2DH&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks&lt;/P&gt;

&lt;P&gt;Sakthivel S OM&lt;/P&gt;</description>
      <pubDate>Wed, 05 Oct 2016 06:37:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102963#M7338</guid>
      <dc:creator>Sakthivel_S_</dc:creator>
      <dc:date>2016-10-05T06:37:23Z</dc:date>
    </item>
    <item>
      <title>can pls some take a look on</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102964#M7339</link>
      <description>&lt;P&gt;can pls some take a look on it .. and provide clarification?&lt;/P&gt;</description>
      <pubDate>Fri, 07 Oct 2016 07:33:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102964#M7339</guid>
      <dc:creator>Sakthivel_S_</dc:creator>
      <dc:date>2016-10-07T07:33:54Z</dc:date>
    </item>
    <item>
      <title>Did you check to make sure</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102965#M7340</link>
      <description>&lt;P&gt;Did you check to make sure that the OS (or hypervisor) was not changing your programming of the Fixed-Function Counter control register? (MSR 0x38d)&lt;/P&gt;

&lt;P&gt;The NMI Watchdog often uses a fixed-function counter, but that may be disabled by default inside VMs.&lt;/P&gt;

&lt;P&gt;The Linux "perf" utility sometimes uses the fixed-function counters for cycle counting, and has the irritating habit of disabling the counters after using them.&lt;/P&gt;</description>
      <pubDate>Fri, 07 Oct 2016 12:37:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102965#M7340</guid>
      <dc:creator>McCalpinJohn</dc:creator>
      <dc:date>2016-10-07T12:37:48Z</dc:date>
    </item>
    <item>
      <title> </title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102966#M7341</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;Thanks for you valuable feedback. i just verified the points u denoted here.&lt;/P&gt;

&lt;P&gt;first, I have printed FFC control register(0x38d) just before exiting the program, i got the proper configured value also there is No perf utility installed on my machine.&lt;/P&gt;

&lt;P&gt;I have disabled NMI on VMs and tried the same program , but there is no change in the result(Please find below results).&lt;/P&gt;

&lt;UL&gt;
	&lt;LI&gt;FFC control:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 546&lt;/LI&gt;
	&lt;LI&gt;FFC 0 instr retired:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 6691&lt;/LI&gt;
	&lt;LI&gt;FFC 1 core cycles:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp; &amp;lt;---&lt;/LI&gt;
	&lt;LI&gt;FFC 2 ref cycles:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 37601&lt;/LI&gt;
&lt;/UL&gt;

&lt;P&gt;-Sakthivel S OM&lt;/P&gt;</description>
      <pubDate>Fri, 07 Oct 2016 13:57:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102966#M7341</guid>
      <dc:creator>Sakthivel_S_</dc:creator>
      <dc:date>2016-10-07T13:57:40Z</dc:date>
    </item>
    <item>
      <title>This is outside of my area of</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102967#M7342</link>
      <description>&lt;P&gt;This is outside of my area of expertise, but I believe that at least some VMs run at a different ring level than you might expect.&amp;nbsp;&amp;nbsp;&amp;nbsp; This is discussed in the "Software-Based Virtualization" section of &lt;A href="https://en.wikipedia.org/wiki/X86_virtualization" target="_blank"&gt;https://en.wikipedia.org/wiki/X86_virtualization&lt;/A&gt;, for example.&amp;nbsp;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;I noticed that you showed the results of setting MSR 0x38d to 0x222 and 0x333 --- what happens with 0x111?&lt;/P&gt;</description>
      <pubDate>Fri, 07 Oct 2016 17:38:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102967#M7342</guid>
      <dc:creator>McCalpinJohn</dc:creator>
      <dc:date>2016-10-07T17:38:51Z</dc:date>
    </item>
    <item>
      <title> instr retired:       231#012</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102968#M7343</link>
      <description>&lt;P&gt;&lt;BR /&gt;
	&amp;nbsp;instr retired:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 231#012&lt;BR /&gt;
	&amp;nbsp;core cyc:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0#012&lt;/P&gt;

&lt;P&gt;ref cyc:&amp;nbsp;&amp;nbsp; #011&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0#012&lt;/P&gt;

&lt;P&gt;These are the values with 0x111 on FFC control register(0x38d).&lt;/P&gt;

&lt;P&gt;As you explained earlier, if FFC is used by NMI or perf utility and reset by them, in this case we can expect all 3 FFCs values are 0. but i never seen 0 in for FFC 1.&lt;/P&gt;</description>
      <pubDate>Sat, 08 Oct 2016 09:07:37 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102968#M7343</guid>
      <dc:creator>Sakthivel_S_</dc:creator>
      <dc:date>2016-10-08T09:07:37Z</dc:date>
    </item>
    <item>
      <title> &lt;TYPO on previous reply&gt;</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102969#M7344</link>
      <description>&lt;DIV class="field field-name-comment-body field-type-text-long field-label-hidden"&gt;
	&lt;DIV class="field-items"&gt;
		&lt;DIV class="field-item even"&gt;
			&lt;P&gt;&amp;nbsp;&amp;lt;TYPO on previous reply&amp;gt;&lt;/P&gt;

			&lt;P&gt;instr retired:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 231&lt;BR /&gt;
				core cyc:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;

			&lt;P&gt;ref cyc:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;

			&lt;P&gt;These are the values with 0x111 on FFC control register(0x38d).&lt;/P&gt;

			&lt;P&gt;As you explained earlier, if FFC is used by NMI or perf utility and reset by them, in this case we can expect all 3 FFCs values are 0. but i never seen 0 in for FFC 1.&lt;/P&gt;
		&lt;/DIV&gt;
	&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Sat, 08 Oct 2016 09:09:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Understanding-vPMC-behaviour-for-FFCs-accross-multiple/m-p/1102969#M7344</guid>
      <dc:creator>Sakthivel_S_</dc:creator>
      <dc:date>2016-10-08T09:09:14Z</dc:date>
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