topic I think in this usage the in Intel® Moderncode for Parallel Architectures

about Cbo and CAs ,help!

zhihong_l_ — Tue, 08 Mar 2016 08:26:21 GMT

hi,

I have a question about haswell architecture :

I am reading haswell EDS document, there are 18 cache agent (CBO) in a 8890v3 socket , but when i read at Home agent(chapter 6.0), it says: "Support for up to 8 Caching Agents (CAs)", It seems that one socket has one Caching Agents(CAs).now I am confusing about Cbo and CAs, Are they the same thing ? what's the different between Cbo and CAs?

can anyone help to figure them out ?

thanks very much!

rejohn

I think in this usage the

McCalpinJohn — Tue, 08 Mar 2016 18:44:03 GMT

I think in this usage the term "Caching Agent" is being used to refer to what might otherwise be called a "node". The functionality of the "caching agent" is implemented across a set of CBo units -- with addresses hashed across that set of CBo units. So the functionality of the caching agent is in the CBo's, but it takes multiple CBo's working together to constitute a "Caching Agent".

"Support for up to 8 Caching Agents" means that there is support for 8 sockets, each acting as one "node". When a transaction reaches a target "node", a hash on the physical address is used to determine which of the CBo's is going to handle the Caching Agent's responsibilities for that transaction.

John,

zhihong_l_ — Wed, 09 Mar 2016 03:23:05 GMT

John,

thank you , now I know that.

And if a transaction reaches a target node ,who is the resbonsibility to hash on the physical address to determine the Cbo to handle it ?(the target nodes's QPI agent or HA ? or the request node ?)

rejohn

I don't think that Intel has

McCalpinJohn — Wed, 09 Mar 2016 21:19:51 GMT

I don't think that Intel has documented the chip-internal protocol with enough detail to know how this is implemented. It is certainly possible that the transaction simply loops around the entire ring and every CBo ignores it except the one that owns that physical address. The description of the R3QPI box in the Xeon E5 v3 Uncore Performance Monitoring Guide seems to support this interpretation, but that could be a misunderstanding on my part.

I have worked on the design of processors that use "broadcast" mechanisms (where every box sees every transaction), and on processors that distribute mapping tables (and use those to convert requests from "broadcast" to "point-to-point" messages), and on processors that use some of each (depending on the transaction type).

It seems likely that the Uncore Performance Monitoring Events for "RING_AD_USED" could be used (in combination with carefully generated test cases) to determine whether the ring uses a broadcast or a point-to-point mechanism to implement the mapping of physical addresses to CBo slices. The details are left as an exercise for the reader....