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    <title>topic There is no perf counter or in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139827#M7751</link>
    <description>&lt;P&gt;There is no perf counter or register with the memory access address that causes the abort. I think the best you can do is to retry the transaction body under a global lock instead of using TSX. In the TSX abort handler you can check the abort status (in EAX register) if the abort was persistent (RETRY bit = 0).&lt;/P&gt;

&lt;P&gt;Roman&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 13 Oct 2017 16:08:12 GMT</pubDate>
    <dc:creator>Roman_D_Intel</dc:creator>
    <dc:date>2017-10-13T16:08:12Z</dc:date>
    <item>
      <title>RTM: Finding memory address at which transaction was aborted</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139823#M7747</link>
      <description>&lt;P&gt;If a page is marked Copy-on-Write, and I try to write to it inside of a transaction, the transaction aborts.&amp;nbsp; If I know the address at which it aborted, there is a trivial fix:&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;int v = addr[0];
__sync_bool_compare_and_swap(addr, v, v); // Force CoW.&lt;/PRE&gt;

&lt;P&gt;And then retry the transaction.&amp;nbsp; Again, this only works if I know the cacheline on which the transaction was aborted.&amp;nbsp; Is there a way to find this?&amp;nbsp; Is it in a performance counter or something?&lt;/P&gt;</description>
      <pubDate>Thu, 12 Oct 2017 00:47:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139823#M7747</guid>
      <dc:creator>William_Leiserson</dc:creator>
      <dc:date>2017-10-12T00:47:16Z</dc:date>
    </item>
    <item>
      <title>Three options that I can</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139824#M7748</link>
      <description>&lt;P&gt;Three options that I can think of:&lt;/P&gt;

&lt;P&gt;a) prior to issuing each instruction that may cause a transaction abort, write the address that may abort into a memory location that won't abort. Somewhat of the same philosophy of a try/catch. Should the transaction abort __sync_fetch_add(loc,0); // RMW&lt;/P&gt;

&lt;P&gt;b) prior to entering the transaction region (and inside your retry code) performs something like&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __sync_fetch_add(locA,0); // RMW&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __sync_fetch_add(locB,0);&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ...&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ... start transaction (if abort, go back/redo __sync_fetch_add's, then retry transaction)&lt;/P&gt;

&lt;P&gt;c) start transaction, then if abort, perform the __sync_fetch_add's of b) and retry transaction&lt;/P&gt;

&lt;P&gt;You will have to determine if choice a),&amp;nbsp;b) or c) is more efficient.&lt;/P&gt;

&lt;P&gt;Jim Dempsey&lt;/P&gt;</description>
      <pubDate>Thu, 12 Oct 2017 14:43:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139824#M7748</guid>
      <dc:creator>jimdempseyatthecove</dc:creator>
      <dc:date>2017-10-12T14:43:45Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139825#M7749</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;before writing to a page you can printf its address using &lt;A href="https://software.intel.com/en-us/blogs/2016/07/29/how-to-printf-inside-aborted-intel-transactional-synchronization-extensions-intel"&gt;tsx_printf&lt;/A&gt; (it escapes transaction also working for transactions that are aborted). You need a processor with Skylake architecture for that.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Roman&lt;/P&gt;</description>
      <pubDate>Thu, 12 Oct 2017 15:54:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139825#M7749</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2017-10-12T15:54:54Z</dc:date>
    </item>
    <item>
      <title>Hi Jim and Roman,</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139826#M7750</link>
      <description>&lt;P&gt;Hi Jim and Roman,&lt;/P&gt;

&lt;P&gt;(a) may be a workable possibility, but it won't catch all cases.&amp;nbsp; Same with tsx_printf (which is very clever, btw; I just read your blog post about it).&lt;/P&gt;

&lt;P&gt;Let me provide some context:&amp;nbsp;&amp;nbsp;&lt;SPAN style="font-size: 1em;"&gt;I'm developing a compiler that allows the code:&lt;/SPAN&gt;&lt;/P&gt;

&lt;PRE class="brush:;"&gt;xbegin;
​// Do some transactional stuff.
xcommit;&lt;/PRE&gt;

&lt;P&gt;If the transaction aborts, it will simply try again until it succeeds.&amp;nbsp; However, the "do some transactional stuff" may call out to C or C++, which contains code that the compiler didn't generate and can't hook.&amp;nbsp; This is expected to be a common scenario in the language.&amp;nbsp; So it could be walking a graph or some such, and the memory is non-trivial to find outside of the transaction.&lt;/P&gt;</description>
      <pubDate>Fri, 13 Oct 2017 15:27:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139826#M7750</guid>
      <dc:creator>William_Leiserson</dc:creator>
      <dc:date>2017-10-13T15:27:47Z</dc:date>
    </item>
    <item>
      <title>There is no perf counter or</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139827#M7751</link>
      <description>&lt;P&gt;There is no perf counter or register with the memory access address that causes the abort. I think the best you can do is to retry the transaction body under a global lock instead of using TSX. In the TSX abort handler you can check the abort status (in EAX register) if the abort was persistent (RETRY bit = 0).&lt;/P&gt;

&lt;P&gt;Roman&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 13 Oct 2017 16:08:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139827#M7751</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2017-10-13T16:08:12Z</dc:date>
    </item>
    <item>
      <title>Roman,</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139828#M7752</link>
      <description>&lt;P&gt;Roman,&lt;/P&gt;

&lt;P&gt;tsx_printf is an interesting hack. I would have done something different.&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;#include &amp;lt;stdio.h&amp;gt;
#include &amp;lt;stdarg.h&amp;gt;
#include &amp;lt;stdlib.h&amp;gt;

#define TSX_PRINTF_BUF_PADD 1024
#define TSX_PRINTF_BUF_LEN (1024*1024)
char tsx_printf_str[TSX_PRINTF_BUF_LEN+TSX_PRINTF_BUF_PADD];
int&amp;nbsp; tsx_printf_fill = 0;
bool tsx_printf_wrapped =&amp;nbsp; false;

int tsx_printf(const char* format, ...)
{
&amp;nbsp;&amp;nbsp;&amp;nbsp; va_list list;
&amp;nbsp;&amp;nbsp;&amp;nbsp; va_start(list, format);
&amp;nbsp;&amp;nbsp;&amp;nbsp; int ret = vsnprintf(str+tsx_printf_fill, TSX_PRINTF_BUF_PADD, format, list);
&amp;nbsp;&amp;nbsp;&amp;nbsp; va_end(list);
&amp;nbsp;&amp;nbsp;&amp;nbsp; if((tsx_printf_fill += ret) == TSX_PRINTF_BUF_LEN)
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_wrapped = true;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; int j = TSX_PRINTF_BUF_LEN;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_fill = 0;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; for(int i = 0; i &amp;lt; ret; ++i)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_str[tsx_printf_fill++] = tsx_printf_str[j++];
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; return ret;
}

void tsx_printf_dump()
{
&amp;nbsp;&amp;nbsp;&amp;nbsp; if(tsx_printf_wrapped)
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_str[TSX_PRINTF_BUF_LEN] = 0;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printf(&amp;amp;tsx_printf_str[tsx_printf_fill]);
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_str[tsx_printf_fill] = 0;
&amp;nbsp;&amp;nbsp;&amp;nbsp; printf((&amp;amp;tsx_printf_str);
&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_fill = 0;
&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx_printf_wrapped =&amp;nbsp; false;
}
&lt;/PRE&gt;

&lt;P&gt;Jim Dempsey&lt;/P&gt;</description>
      <pubDate>Sun, 15 Oct 2017 10:42:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139828#M7752</guid>
      <dc:creator>jimdempseyatthecove</dc:creator>
      <dc:date>2017-10-15T10:42:00Z</dc:date>
    </item>
    <item>
      <title>Okay, yeah.  I was afraid of</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139829#M7753</link>
      <description>&lt;P&gt;Okay, yeah.&amp;nbsp; I was afraid of that.&amp;nbsp; Thanks Roman.&lt;/P&gt;</description>
      <pubDate>Mon, 16 Oct 2017 00:10:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139829#M7753</guid>
      <dc:creator>William_Leiserson</dc:creator>
      <dc:date>2017-10-16T00:10:13Z</dc:date>
    </item>
    <item>
      <title>Jim,</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139830#M7754</link>
      <description>&lt;P&gt;Jim,&lt;/P&gt;

&lt;P&gt;changes to your tsx_printf memory buffer will be lost in case of an abort (e.g. if it happens after tsx_printf). The Intel processor trace records instruction control flow also in aborted transactions. My tsx_printf is (mis-)using it allowing the output data survive aborts.&lt;/P&gt;

&lt;P&gt;Best regards,&lt;/P&gt;

&lt;P&gt;Roman&lt;/P&gt;</description>
      <pubDate>Mon, 16 Oct 2017 06:14:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139830#M7754</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2017-10-16T06:14:53Z</dc:date>
    </item>
    <item>
      <title>Quote:jimdempseyatthecove</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139831#M7755</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;jimdempseyatthecove wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;a) prior to issuing each instruction that may cause a transaction abort, write the address that may abort into a memory location that won't abort. Somewhat of the same philosophy of a try/catch. Should the transaction abort __sync_fetch_add(loc,0); // RMW&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Hi Jim,&lt;/P&gt;

&lt;P&gt;I've been thinking more about this.&amp;nbsp; Is there a way to specify the memory I don't want added the transaction, or is there pre-defined memory that I can use?&amp;nbsp; Do you have a link with information on how this would work?&lt;/P&gt;</description>
      <pubDate>Tue, 17 Oct 2017 18:28:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139831#M7755</guid>
      <dc:creator>William_Leiserson</dc:creator>
      <dc:date>2017-10-17T18:28:40Z</dc:date>
    </item>
    <item>
      <title>Roman, oops. You are right.</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139832#M7756</link>
      <description>&lt;P&gt;Roman, oops. You are right.&lt;/P&gt;

&lt;P&gt;William, either all memory access is transactional or not. The instruction trace hack is not backed out. You could potentially use the instruction trace information in your transaction abort handler. This should be documented in a systems programmer manual. Perhaps Roman could provide a link. Converting the address into source code line number would be up to you to figure out.&lt;/P&gt;

&lt;P&gt;Jim Dempsey&lt;/P&gt;</description>
      <pubDate>Wed, 18 Oct 2017 16:28:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139832#M7756</guid>
      <dc:creator>jimdempseyatthecove</dc:creator>
      <dc:date>2017-10-18T16:28:49Z</dc:date>
    </item>
    <item>
      <title>Hey Jim,</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139833#M7757</link>
      <description>&lt;P&gt;Hey Jim,&lt;/P&gt;

&lt;P&gt;This was what I thought.&amp;nbsp; I must have misunderstood your first comment.&lt;/P&gt;

&lt;P&gt;Thanks!&lt;/P&gt;</description>
      <pubDate>Wed, 18 Oct 2017 19:04:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139833#M7757</guid>
      <dc:creator>William_Leiserson</dc:creator>
      <dc:date>2017-10-18T19:04:58Z</dc:date>
    </item>
    <item>
      <title>Setting up processor trace</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139834#M7758</link>
      <description>&lt;P&gt;Setting up processor trace recording and reading the results directly from hardware is only possible in the kernel (ring 0) and not from user space. I am not sure if it is practical for this use case (compiler).&lt;/P&gt;

&lt;P&gt;Roman&lt;/P&gt;</description>
      <pubDate>Fri, 20 Oct 2017 08:23:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/RTM-Finding-memory-address-at-which-transaction-was-aborted/m-p/1139834#M7758</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2017-10-20T08:23:13Z</dc:date>
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