https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyperthreading-amp-False-Sharing/m-p/1660997#M8219 <P>Hello folks,</P><P>&nbsp;</P><P>I couldn't find any concrete reference so I've decided to ask my question here.</P><P>In the case of a physical core composed of 2 threads with hyperthreading and the core containing an L1 cache shared for the 2 threads, could we face false sharing?</P><P>It's not clear to me if false sharing would still be a thing because a cache line is "owned" by one or the other thread, or if conversely, false sharing wouldn't apply because a cache line would already be in the same L1 cache.</P><P>Hope my question is clear.</P> Mon, 27 Jan 2025 23:21:55 GMT bclark 2025-01-27T23:21:55Z https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyperthreading-amp-False-Sharing/m-p/1660997#M8219 <P>Hello folks,</P><P>&nbsp;</P><P>I couldn't find any concrete reference so I've decided to ask my question here.</P><P>In the case of a physical core composed of 2 threads with hyperthreading and the core containing an L1 cache shared for the 2 threads, could we face false sharing?</P><P>It's not clear to me if false sharing would still be a thing because a cache line is "owned" by one or the other thread, or if conversely, false sharing wouldn't apply because a cache line would already be in the same L1 cache.</P><P>Hope my question is clear.</P> Mon, 27 Jan 2025 23:21:55 GMT https://community.intel.com/t5/Intel-Moderncode-for-Parallel/Hyperthreading-amp-False-Sharing/m-p/1660997#M8219 bclark 2025-01-27T23:21:55Z