<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic About lockfree_mpmc ... in Intel® Moderncode for Parallel Architectures</title>
    <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809744#M940</link>
    <description>&lt;BR /&gt;Hello again,&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Sorry, as you have noticied there is loads on&lt;BR /&gt;setObject(lastTail,tm) between line [2] and line [4].&lt;BR /&gt;&lt;BR /&gt;And loads are not reordered with older loads on x86&lt;BR /&gt;&lt;BR /&gt;So i think there is no problem with lockfree_mpmc.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Amine Moulay Ramdne&lt;BR /&gt;&lt;BR /&gt;</description>
    <pubDate>Sun, 03 Jun 2012 19:23:02 GMT</pubDate>
    <dc:creator>aminer10</dc:creator>
    <dc:date>2012-06-03T19:23:02Z</dc:date>
    <item>
      <title>About lockfree_mpmc ...</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809742#M938</link>
      <description>&lt;BR /&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;I think i have forgot something with lockfree_mpmc...&lt;BR /&gt;&lt;BR /&gt;Please follow with me... &lt;BR /&gt;&lt;BR /&gt;The Intel x86 memory model, detailed in Intel 64 Architecture Memory Ordering White Paper &lt;BR /&gt;and the AMD spec, AMD64 Architecture Programmers Manual, list a lot of memory ordering &lt;BR /&gt;guarantees, among them:&lt;BR /&gt;&lt;BR /&gt;Loads are not reordered with other loads. &lt;BR /&gt;Stores are not reordered with other stores. &lt;BR /&gt;Stores are not reordered with older loads. &lt;BR /&gt;In a multiprocessor system, memory ordering obeys causality (memory ordering respects transitive visibility). &lt;BR /&gt;In a multiprocessor system, stores to the same location have a total order. &lt;BR /&gt;In a multiprocessor system, locked instructions have a total order. &lt;BR /&gt;Loads and stores are not reordered with locked instructions. &lt;BR /&gt;&lt;DIV&gt;&lt;BR /&gt;But since on x86 Loads may be reordered with older stores to different locations &lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;So please take a look at the following lockfree_mpmc code: &lt;BR /&gt;&lt;BR /&gt;---&lt;BR /&gt;&lt;BR /&gt;function TLockfree_MPMC.push(tm : tNodeQueue):boolean;&lt;BR /&gt;var lasttail,newtemp:long;&lt;BR /&gt;i,j:integer;&lt;BR /&gt;begin&lt;BR /&gt;&lt;BR /&gt;if getlength &amp;gt;= fsize &lt;BR /&gt; then &lt;BR /&gt; begin&lt;BR /&gt; result:=false;&lt;BR /&gt; exit;&lt;BR /&gt; end; &lt;BR /&gt;result:=true;&lt;BR /&gt;&lt;BR /&gt;[1]newTemp:=LockedIncLong(temp);&lt;BR /&gt;&lt;BR /&gt;[2] lastTail:=newTemp-1;&lt;BR /&gt;setObject(lastTail,tm);&lt;BR /&gt;&lt;BR /&gt;[3]&lt;BR /&gt;&lt;BR /&gt;repeat&lt;BR /&gt;&lt;BR /&gt;[4] if CAS(tail,lasttail,newtemp) &lt;BR /&gt; then &lt;BR /&gt; begin&lt;BR /&gt; exit; &lt;BR /&gt; end;&lt;BR /&gt;sleep(0);&lt;BR /&gt;until false;&lt;BR /&gt;&lt;BR /&gt;end;&lt;BR /&gt;---&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;So the the loads of lasttail and newtemp in [4] line can be reordered &lt;BR /&gt;with older stores of lastail and newtemp in [1] [2], so in this case must &lt;BR /&gt;i insert an mfence in line [3] to respect the logic of the program?...&lt;BR /&gt;&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thank you,&lt;BR /&gt;Amine Moulay Ramdane.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/DIV&gt;</description>
      <pubDate>Sun, 03 Jun 2012 18:59:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809742#M938</guid>
      <dc:creator>aminer10</dc:creator>
      <dc:date>2012-06-03T18:59:41Z</dc:date>
    </item>
    <item>
      <title>About lockfree_mpmc ...</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809743#M939</link>
      <description>&lt;SPAN style="font-size: x-small;"&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;Hello again,&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Sorry, as you have noticied there is loads on&lt;BR /&gt;setObject(lastTail,tm)between line [2] and line [4].&lt;BR /&gt;&lt;BR /&gt;And loads are not reordered with older loads on x86 &lt;BR /&gt;&lt;BR /&gt;So i think there is no problemwith lockfree_mpmc.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Amine Moulay Ramdne&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;/SPAN&gt;</description>
      <pubDate>Sun, 03 Jun 2012 19:19:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809743#M939</guid>
      <dc:creator>aminer10</dc:creator>
      <dc:date>2012-06-03T19:19:13Z</dc:date>
    </item>
    <item>
      <title>About lockfree_mpmc ...</title>
      <link>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809744#M940</link>
      <description>&lt;BR /&gt;Hello again,&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Sorry, as you have noticied there is loads on&lt;BR /&gt;setObject(lastTail,tm) between line [2] and line [4].&lt;BR /&gt;&lt;BR /&gt;And loads are not reordered with older loads on x86&lt;BR /&gt;&lt;BR /&gt;So i think there is no problem with lockfree_mpmc.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you.&lt;BR /&gt;Amine Moulay Ramdne&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Sun, 03 Jun 2012 19:23:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Moderncode-for-Parallel/About-lockfree-mpmc/m-p/809744#M940</guid>
      <dc:creator>aminer10</dc:creator>
      <dc:date>2012-06-03T19:23:02Z</dc:date>
    </item>
  </channel>
</rss>

