ICC compiler errors (emit invalid byte code)

hyungseok — Wed, 12 Jun 2024 09:34:33 GMT

I found that x86-64 ICC 2021.10.0 emits invalid byte sequence.

This error has been identified in 168 opcodes.

Buggy Code contains the 168 opcodes. You can compile the following code with '-m32' option.

void bug(int num) {

__asm__(".intel_syntax noprefix\n");

__asm__("nop\n" ".align 16\n"

"vaddpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vaddps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vaddsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vaddss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vcomisd XMM0, XMM0, 1\n" ".align 16\n"

"vcomiss XMM0, XMM0, 1\n" ".align 16\n"

"vcvtdq2ps ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvtpd2dq YMM0, ZMM0, 1\n" ".align 16\n"

"vcvtpd2ps YMM0, ZMM0, 1\n" ".align 16\n"

"vcvtpd2qq ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvtpd2udq YMM0, ZMM0, 1\n" ".align 16\n"

"vcvtph2ps ZMM0, YMM0, 1\n" ".align 16\n"

"vcvtps2dq XMM0, [EAX]\n" ".align 16\n"

"vcvtps2ph 1, 1, ZMM0, YMM0\n" ".align 16\n"

"vcvtps2qq XMM0, [1]\n" ".align 16\n"

"vcvtps2udq ZMM0, [EAX]\n" ".align 16\n"

"vcvtqq2pd ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvtqq2ps YMM0, ZMM0, 1\n" ".align 16\n"

"vcvtsd2si EBP, [1]\n" ".align 16\n"

"vcvtsd2ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vcvtsd2usi EBX, XMM0, 1\n" ".align 16\n"

"vcvtsi2ss XMM0, XMM0, EBP, 1\n" ".align 16\n"

"vcvtss2sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vcvtss2si EBX, XMM0, 1\n" ".align 16\n"

"vcvtss2usi ESI, XMM0, 1\n" ".align 16\n"

"vcvttpd2dq YMM0, ZMM0, 1\n" ".align 16\n"

"vcvttpd2qq ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvttpd2udq YMM0, ZMM0, 1\n" ".align 16\n"

"vcvttps2dq YMM0, XMMWORD PTR [EAX]\n" ".align 16\n"

"vcvttps2qq ZMM0, YMM0, 1\n" ".align 16\n"

"vcvttps2udq ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvttps2uqq ZMM0, YMM0, 1\n" ".align 16\n"

"vcvttsd2si ESI, [EAX+1]\n" ".align 16\n"

"vcvttsd2usi ECX, XMM0, 1\n" ".align 16\n"

"vcvttss2si EDX, XMM0, 1\n" ".align 16\n"

"vcvttss2usi ESI, XMM0, 1\n" ".align 16\n"

"vcvtudq2ps ZMM0, [1]\n" ".align 16\n"

"vcvtuqq2pd ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvtuqq2ps YMM0, ZMM0, 1\n" ".align 16\n"

"vcvtusi2ss XMM0, XMM0, EBP, 1\n" ".align 16\n"

"vdivpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vdivps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vdivsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vdivss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vexp2pd ZMM0, ZMM0, 1\n" ".align 16\n"

"vexp2ps ZMM0, ZMM0, 1\n" ".align 16\n"

"vfixupimmpd ZMM0, ZMM0, ZMM0, 1, 1\n" ".align 16\n"

"vfixupimmps 1, 1, ZMM0, ZMM0, ZMM0\n" ".align 16\n"

"vfixupimmsd XMM0, XMM0, XMM0, 1, 1\n" ".align 16\n"

"vfixupimmss XMM0, XMM0, XMM0, 1, 1\n" ".align 16\n"

"vfmadd132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd132sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmadd132ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmadd213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd213sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmadd213ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmadd231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmadd231sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmadd231ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmaddsub132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmaddsub132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmaddsub213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmaddsub213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmaddsub231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmaddsub231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub132sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsub132ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsub213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub213sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsub213ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsub231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsub231sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsub231ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfmsubadd132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsubadd132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsubadd213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsubadd213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsubadd231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfmsubadd231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd132sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmadd132ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmadd213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd213sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmadd213ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmadd231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmadd231sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmadd231ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub132pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub132ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub132sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub132ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub213pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub213ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub213sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub213ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub231pd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub231ps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vfnmsub231sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vfnmsub231ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vgetexppd ZMM0, ZMM0, 1\n" ".align 16\n"

"vgetexpps ZMM0, ZMM0, 1\n" ".align 16\n"

"vgetexpsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vgetexpss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vgetmantpd 1, 1, ZMM0, ZMM0\n" ".align 16\n"

"vgetmantps ZMM0, ZMM0, 1, 1\n" ".align 16\n"

"vgetmantsd 1, 1, XMM0, XMM0, XMM0\n" ".align 16\n"

"vgetmantss XMM0, XMM0, XMM0, 1, 1\n" ".align 16\n"

"vmaxpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vmaxps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vmaxsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vmaxss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vminpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vminps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vminsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vminss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vmulpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vmulps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vmulsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vmulss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vrangepd 1, 1, ZMM0, ZMM0, ZMM0\n" ".align 16\n"

"vrangeps 1, 1, ZMM0, ZMM0, ZMM0\n" ".align 16\n"

"vrangesd 1, 1, XMM0, XMM0, XMM0\n" ".align 16\n"

"vrangess 1, 1, XMM0, XMM0, XMM0\n" ".align 16\n"

"vrcp28pd ZMM0, ZMM0, 1\n" ".align 16\n"

"vrcp28ps ZMM0, ZMM0, 1\n" ".align 16\n"

"vrcp28sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vrcp28ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vreducepd 1, 1, ZMM0, ZMM0\n" ".align 16\n"

"vreduceps 1, 1, ZMM0, ZMM0\n" ".align 16\n"

"vreducesd 1, 1, XMM0, XMM0, XMM0\n" ".align 16\n"

"vreducess XMM0, XMM0, XMM0, 1, 1\n" ".align 16\n"

"vrndscalepd ZMM0, ZMM0, 1, 1\n" ".align 16\n"

"vrndscaleps 1, 1, ZMM0, ZMM0\n" ".align 16\n"

"vrndscalesd 1, 1, XMM0, XMM0, XMM0\n" ".align 16\n"

"vrndscaless XMM0, XMM0, XMM0, 1, 1\n" ".align 16\n"

"vrsqrt28pd ZMM0, ZMM0, 1\n" ".align 16\n"

"vrsqrt28ps ZMM0, ZMM0, 1\n" ".align 16\n"

"vrsqrt28sd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vrsqrt28ss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vscalefpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vscalefps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vscalefsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vscalefss XMM0, XMM0, [EAX]\n" ".align 16\n"

"vsqrtpd ZMM0, ZMM0, 1\n" ".align 16\n"

"vsqrtps ZMM0, ZMM0, 1\n" ".align 16\n"

"vsqrtsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vsqrtss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vsubpd ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vsubps ZMM0, ZMM0, ZMM0, 1\n" ".align 16\n"

"vsubsd XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vsubss XMM0, XMM0, XMM0, 1\n" ".align 16\n"

"vucomisd XMM0, XMM0, 1\n" ".align 16\n"

"vucomiss XMM0, XMM0, 1\n" ".align 16\n"

"vcvtpd2uqq ZMM0, ZMM0, 1\n" ".align 16\n"

"vcvtps2pd ZMM0, YMM0, 1\n" ".align 16\n"

"vcvtps2uqq ZMM0, YMM0, 1\n" ".align 16\n"

"vcvttpd2uqq ZMM0, ZMM0, 1\n" ".align 16\n"

);

}

Compile Option: -m32

Compiled Code:

bug:

push ebp

mov ebp,esp

sub esp,0x8

nop

lea esi,[esi+eiz*1+0x0]

xchg ax,ax

vaddpd zmm0,zmm0,zmm0

add DWORD PTR [ebp+0x26b4],ecx

add BYTE PTR [eax],al

xchg ax,ax

vaddps zmm0,zmm0,zmm0

add DWORD PTR [ebp+0x26b4],ecx

add BYTE PTR [eax],al

xchg ax,ax

...

xchg ax,ax

vcvtps2uqq zmm0,ymm0

add DWORD PTR [ebp+0x26b4],ecx

add BYTE PTR [eax],al

xchg ax,ax

vcvttpd2uqq zmm0,zmm0

add DWORD PTR [ebp+0x26b4],ecx

add BYTE PTR [eax],al

xchg ax,ax

leave

ret

You can check overall results through the godbolt.

https://godbolt.org/z/a6Ynnqzdf

Re: ICC compiler errors (emit invalid byte code)

Alex_Y_Intel — Tue, 18 Jun 2024 06:01:23 GMT

ICC has been deprecated and removed from our oneAPI Base Toolkit since later versions in 2023. Please migrate to using ICX compiler instead.

topic Re: ICC compiler errors (emit invalid byte code) in Intel® oneAPI DPC++/C++ Compiler

ICC compiler errors (emit invalid byte code)

Re: ICC compiler errors (emit invalid byte code)