<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic thank you Keneeth, so I'll in Intel® oneAPI Math Kernel Library</title>
    <link>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057822#M21536</link>
    <description>&lt;P&gt;thank you Keneeth, so I'll just partitionen them myself.&lt;/P&gt;

&lt;P&gt;One more question though: Is it possible to transfer data between two xeon phi cards directly (i.e., without having to copy the data to the host) while using the offload model. Alternatively, is it possible to access the memory of another Xeon Phi remotely from a different device? If so, how is that done?&lt;/P&gt;

&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Fri, 23 Jan 2015 06:48:00 GMT</pubDate>
    <dc:creator>Paul_S_</dc:creator>
    <dc:date>2015-01-23T06:48:00Z</dc:date>
    <item>
      <title>Multiple Xeon Phi's</title>
      <link>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057820#M21534</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;

&lt;P&gt;Is it possible to use LEO directives to offload a ZGEMM call to multiple Xeon Phi coprocessors in a way such that they distribute the work among them automatically without me having to partition the matrices myself?&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;Paul&lt;/P&gt;</description>
      <pubDate>Thu, 22 Jan 2015 22:04:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057820#M21534</guid>
      <dc:creator>Paul_S_</dc:creator>
      <dc:date>2015-01-22T22:04:26Z</dc:date>
    </item>
    <item>
      <title>Hi, currently there is no way</title>
      <link>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057821#M21535</link>
      <description>&lt;P&gt;Hi, currently there is no way to target multiple Xeon phi cards in the way that you mention. Using Automatic offload &amp;nbsp;there is a chance that if the MKL runtime determines that the problem is worth running on multiple phi cards that it will do the offload to multiple cards for you, but there is no way to strongly suggest to the runtime to do this.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Let me know if this answer your question.&lt;/P&gt;

&lt;P&gt;Regards,&lt;/P&gt;

&lt;P&gt;Kenneth&lt;/P&gt;

&lt;P&gt;Intel Developer Support&lt;/P&gt;</description>
      <pubDate>Fri, 23 Jan 2015 00:32:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057821#M21535</guid>
      <dc:creator>Kenneth_C_Intel</dc:creator>
      <dc:date>2015-01-23T00:32:21Z</dc:date>
    </item>
    <item>
      <title>thank you Keneeth, so I'll</title>
      <link>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057822#M21536</link>
      <description>&lt;P&gt;thank you Keneeth, so I'll just partitionen them myself.&lt;/P&gt;

&lt;P&gt;One more question though: Is it possible to transfer data between two xeon phi cards directly (i.e., without having to copy the data to the host) while using the offload model. Alternatively, is it possible to access the memory of another Xeon Phi remotely from a different device? If so, how is that done?&lt;/P&gt;

&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 23 Jan 2015 06:48:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-oneAPI-Math-Kernel-Library/Multiple-Xeon-Phi-s/m-p/1057822#M21536</guid>
      <dc:creator>Paul_S_</dc:creator>
      <dc:date>2015-01-23T06:48:00Z</dc:date>
    </item>
  </channel>
</rss>

