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    <title>topic Sounds good, thanks for the in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939088#M1701</link>
    <description>&lt;P&gt;Sounds good, thanks for the heads-up. How soon do you think your dev version will turn into a release?&lt;/P&gt;
&lt;P&gt;Thanks, Andreas&lt;/P&gt;</description>
    <pubDate>Wed, 17 Jul 2013 15:52:58 GMT</pubDate>
    <dc:creator>Kloeckner__Andreas</dc:creator>
    <dc:date>2013-07-17T15:52:58Z</dc:date>
    <item>
      <title>Miscompiled control flow</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939085#M1698</link>
      <description>&lt;P&gt;Hi there,&lt;/P&gt;
&lt;P&gt;I've attached a test case (a gutted version of a segmented scan) that gets miscompiled by intel_sdk_for_ocl_applications_2013_xe_runtime_3.0.67279_x64, at least when running on my i7-2620M.&lt;/P&gt;
&lt;P&gt;Specifically, when running this self-contained test code using PyOpenCL, I get the line&lt;/P&gt;
&lt;P&gt;gid:0 fsii:0&lt;/P&gt;
&lt;P&gt;printed 16 times for each of the two work groups. If you look at the kernel, that means that the printf() in the trailing snippet:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (get_local_id(0) == 0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&amp;nbsp;&amp;nbsp; &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printf("gid:%d fsii:%d\n", psc_GID_0, psc_first_segment_start_in_interval);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;
&lt;P&gt;got executed 16 times for group id 0. In my book, it should be executed exactly once. (Confirmed by running against other implementations. Intel OpenCL 2012 also gets this right.)&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;Andreas&lt;/P&gt;</description>
      <pubDate>Sat, 29 Jun 2013 01:55:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939085#M1698</guid>
      <dc:creator>Kloeckner__Andreas</dc:creator>
      <dc:date>2013-06-29T01:55:56Z</dc:date>
    </item>
    <item>
      <title>Sorry for late response.</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939086#M1699</link>
      <description>&lt;P&gt;Sorry for late response. Thanks for the code. We'll take a look and get back to you.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jul 2013 17:09:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939086#M1699</guid>
      <dc:creator>Raghupathi_M_Intel</dc:creator>
      <dc:date>2013-07-12T17:09:33Z</dc:date>
    </item>
    <item>
      <title>Hi Andreas,</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939087#M1700</link>
      <description>Hi Andreas,

I was able to reproduce the issue on the release version (67279), but I don't see it on our latest development versions, the output I get is:
gid:0 fsii:0
gid:1 fsii:0

So obviously it has been fixed since that.

Thanks,
Yuri</description>
      <pubDate>Mon, 15 Jul 2013 10:27:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939087#M1700</guid>
      <dc:creator>Yuri_K_Intel</dc:creator>
      <dc:date>2013-07-15T10:27:39Z</dc:date>
    </item>
    <item>
      <title>Sounds good, thanks for the</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939088#M1701</link>
      <description>&lt;P&gt;Sounds good, thanks for the heads-up. How soon do you think your dev version will turn into a release?&lt;/P&gt;
&lt;P&gt;Thanks, Andreas&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jul 2013 15:52:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939088#M1701</guid>
      <dc:creator>Kloeckner__Andreas</dc:creator>
      <dc:date>2013-07-17T15:52:58Z</dc:date>
    </item>
    <item>
      <title>Hi, the control flow you have</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939089#M1702</link>
      <description>&lt;P&gt;Hi, the control flow you have established on the estructure&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jul 2013 06:46:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Miscompiled-control-flow/m-p/939089#M1702</guid>
      <dc:creator>JLuna5</dc:creator>
      <dc:date>2013-07-23T06:46:50Z</dc:date>
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